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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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HC705P6AGRS/D 数据表(PDF) 26 Page - NXP Semiconductors |
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HC705P6AGRS/D 数据表(HTML) 26 Page - NXP Semiconductors |
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26 / 134 page  Memory General Release Specification MC68HC705P6A — Rev. 1.0 Memory Addr. Name R/W Bit 7 654321 Bit 0 $0000 Port A Data, PORTA Read: PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0 Write: $0001 Port B Data, PORTB Read: PB7 PB6 PB5 00000 Write: $0002 Port C Data, PORTC Read: PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0 Write: $0003 Port D Data, PORTD Read: PD7 0 PD5 10000 Write: $0004 Port A Data Direction, DDRA Read: DDRA7 DDRA6 DDRA5 DDRA4 DDRA3 DDRA2 DDRA1 DDRA0 Write: $0005 Port B Data Direction, DDRB Read: DDRB7 DDRB6 DDRB5 11111 Write: $0006 Port C Data Direction, DDRC Read: DDRC7 DDRC6 DDRC5 DDRC4 DDRC3 DDRC2 DDRC1 DDRC0 Write: $0007 Port D Data Direction, DDRD Read: 0 0 DDRD5 00000 Write: $0008 Unimplemented Read: Write: $0009 Unimplemented Read: Write: $000A SIOP Control Register, SCR Read: 0 SPE 0 MSTR 0000 Write: $000B SIOP Status Register, SSR Read: SPIF DCOL 000000 Write: $000C SIOP Data Register, SDR Read: SDR7 SDR6 SDR5 SDR4 SDR3 SSDR2 SDR1 SDR0 Write: $000D Reserved for Test Read: RRRRRRRR Write: $000E Unimplemented Read: Write: $000F Unimplemented Read: Write: = Unimplemented R = Reserved Figure 2-3. I/O and Control Register Summary Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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