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HC705P6AGRS/D 数据表(PDF) 99 Page - NXP Semiconductors |
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HC705P6AGRS/D 数据表(HTML) 99 Page - NXP Semiconductors |
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99 / 134 page  General Release Specification Registers MC68HC705P6A — Rev. 1.0 General Release Specification CPU Core Z — Zero Bit The zero bit is set when the result of the last arithmetic operation, logical operation, data manipulation, or data load operation was zero. C — Carry/Borrow Bit The carry/borrow bit is set when a carry out of bit 7 of the accumulator occurred during the last arithmetic operation, logical operation, or data manipulation. The carry/borrow bit is also set or cleared during bit test and branch instructions and during shifts and rotates. This bit is not set by an INC or DEC instruction. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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