HC705P6AGRSSLASHD datasheet(75/134 Pages) NXP

部件名	HC705P6AGRS/D

功能描述	The Motorola MC68HC705P6A is an EPROM version of the MC68HC05P6 microcontroller

PDF	134 Pages

Scroll/Zoom	100%

制造商	NXP [NXP Semiconductors]

网页	http://www.nxp.com

标志

75 / 134 page

General Release Specification

Timer During Wait/Halt Mode

MC68HC705P6A — Rev. 1.0

General Release Specification

Capture/Compare Timer

8.5 Timer During Wait/Halt Mode

The CPU clock halts during the wait (or halt) mode, but the timer remains

active. If interrupts are enabled, a timer interrupt will cause the processor

to exit the wait mode.

8.6 Timer During Stop Mode

In the stop mode, the timer stops counting and holds the last count value

if STOP is exited by an interrupt. If STOP is exited by RESET, the

counters are forced to $FFFC. During STOP, if at least one valid input

capture edge occurs at the TCAP pins, the input capture detect circuit is

armed. This does not set any timer flags or wake up the MCU, but if an

interrupt is used to exit stop mode, there is an active input capture flag

and data from the first valid edge that occurred during the stop mode. If

RESET is used to exit stop mode, then no input capture flag or data

remains, even if a valid input capture edge occurred.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC705P6AGRS/D 数据表(PDF) 75 Page - NXP Semiconductors