HC705P6AGRSSLASHD datasheet(52/134 Pages) NXP

52 / 134 page

Input/Output Ports

General Release Specification

MC68HC705P6A — Rev. 1.0

Input/Output Ports

6.5 Port C

Port C is an 8-bit bidirectional port which can share pins PC3–PC7 with

the A/D subsystem. The port C data register is located at address $0002

and its data direction register (DDR) is located at address $0006. The

contents of the port C data register are indeterminate at initial powerup

and must be initialized by user software. Reset does not affect the data

registers, but clears the DDRs, thereby setting all of the port pins to input

mode. Writing a one to a DDR bit sets the corresponding port pin to

output mode (see Figure 6-3).

Port C may be used for general I/O applications when the A/D

subsystem is disabled. The ADON bit in register ADSC is used to

enable/disable the A/D subsystem. Care must be exercised when using

pins PC0–PC2 while the A/D subsystem is enabled. Accidental changes

to bits that affect pins PC3–PC7 in the data or DDR registers will produce

unpredictable results in the A/D subsystem. See Section 9. Analog

Subsystem.

Figure 6-3. Port C I/O Circuitry

READ $0002

WRITE $0002

READ $0006

DATA

I/O

OUTPUT

INTERNAL HC05

DATA BUS

RESET

(RST)

WRITE $0006

DATA DIRECTION

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC705P6AGRS/D 数据表(PDF) 52 Page - NXP Semiconductors

HC705P6AGRS/D 数据表(HTML) 52 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载