HC705P6AGRSSLASHD datasheet(85/134 Pages) NXP

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General Release Specification

EPROM Programming Register (EPROG)

MC68HC705P6A — Rev. 1.0

General Release Specification

EPROM

EPROG register and the state of these bits coming out of reset. All the

bits in the EPROG register are cleared by reset.

EPGM — EPROM Program Control

If the EPGM bit is set, programming power is applied to the EPROM

array. If the EPGM bit is cleared, programming power is removed

from the EPROM array. The EPGM bit cannot be set unless the ELAT

bit is set already.

Whenever the ELAT bit is cleared, the EPGM bit is cleared also. Both

the EPGM and the ELAT bit cannot be set using the same write

instruction. Any attempt to set both the EPGM and ELAT bit on the

same write instruction cycle will result in the ELAT bit being set and

the EPGM bit being cleared. The EPGM bit is a read-write bit and can

be read at any time. The EPGM bit is cleared by reset.

ELAT— EPROM Latch Control

If the ELAT bit is set, the EPROM address and data bus are

configured for programming to the array. If the ELAT bit is cleared, the

EPROM address and data bus are configured for normal reading of

data from the array. When the ELAT bit is set, the address and data

bus are latched in the EPROM array when a subsequent write to the

array is made. Data in the EPROM array cannot be read if the ELAT

bit is set.

Whenever the ELAT bit is cleared, the EPGM bit is cleared also. Both

the EPGM and the ELAT bit cannot be set using the same write

instruction. Any attempt to set both the EPGM and ELAT bit on the

same write instruction cycle will result in the ELAT bit being set and

the EPGM bit being cleared. The ELAT bit is a read-write bit and can

be read at any time. The ELAT bit is cleared by reset.

$1C

Bit 7

654321

Bit 0

Read:

00000

ELAT

EPGM

Write:

Reset:

00000000

= Unimplemented

Figure 10-1. EPROM Programming Register (EPROG)

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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