HC705P6AGRSSLASHD datasheet(91/134 Pages) NXP

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MC68HC705P6A — Rev. 1.0

General Release Specification

Mask Option Register (MOR)

General Release Specification — MC68HC705P6A

Section 11. Mask Option Register (MOR)

11.1 Contents

11.2

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .91

11.3

Mask Option Register (MOR) $1EFF–$1F00 . . . . . . . . . . . . . .92

11.4

MOR Programming. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .94

11.2 Introduction

The mask option register (MOR) contains two bytes of EPROM used to

enable or disable each of the features controlled by mask options on the

MC68HC05P6 (a ROM version of the MC68HC705P6A). The seven

programmable options on the MC68HC705P6A are:

1. COP watchdog timer (enable or disable)

2. IRQ triggering (edge- or edge- and level-sensitive)

3. SIOP data bit order (most significant bit or least significant bit first)

4. SIOP clock rate (OSC divided by 8, 16, 32, or 64)

5. Stop instruction mode (stop mode or halt mode)

6. Secure EPROM from external reading

7. Keyscan interrupt/pullups on PA0–PA7

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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