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HC705P6AGRS/D 数据表(PDF) 32 Page - NXP Semiconductors |
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HC705P6AGRS/D 数据表(HTML) 32 Page - NXP Semiconductors |
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32 / 134 page ![]() Operating Modes General Release Specification MC68HC705P6A — Rev. 1.0 Operating Modes 3.3 User Mode The user mode allows the MCU to function as a self-contained microcontroller, with maximum use of the pins for on-chip peripheral functions. All address and data activity occurs within the MCU and are not available externally. User mode is entered on the rising edge of RESET if the IRQ/VPP pin is within the normal operating voltage range. The pinout for the user mode is shown in Figure 3-1. Figure 3-1. User Mode Pinout In the user mode, there is an 8-bit I/O port, a second 8-bit I/O port shared with the A/D subsystem, one 3-bit I/O port shared with the SIOP, and a 3-bit port shared with the 16-bit timer subsystem, which includes one general-purpose I/O pin. Table 3-1. Operating Mode Conditions After Reset RESET Pin IRQ/VPP PD7/TCAP Mode VSS to VDD VSS to VDD Single-Chip VPP VDD Bootloader 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 RESET IRQ/VPP PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0 SDO/PB5 SDI/PB6 SCK/PB7 VSS VDD OSC1 OSC2 PD7/TCAP TCMP PD5 PC0 PC1 PC2 PC3/AD3 PC4/AD2 PC5/AD1 PC6/AD0 PC7/VREFH Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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