HC705P6AGRSSLASHD datasheet(50/134 Pages) NXP

50 / 134 page

Input/Output Ports

General Release Specification

MC68HC705P6A — Rev. 1.0

Input/Output Ports

6.3 Port A

Port A is an 8-bit bidirectional port, which does not share any of its pins

with other subsystems (see Figure 6-1). The port A data register is

located at address $0000 and its data direction register (DDR) is located

at address $0004. The contents of the port A data register are

indeterminate at initial power up and must be initialized by user software.

Reset does not affect the data registers, but does clear the DDRs,

thereby setting all of the port pins to input mode. Writing a one to a DDR

bit sets the corresponding port pin to output mode. Port A has mask

option register enabled interrupt capability with an internal pullup device

NOTE:

The keyscan (pullup/interrupt) feature available on port A is NOT

available in the ROM device, MC68HC05P6.

Figure 6-1. Port A I/O and Interrupt Circuitry

READ $0000

WRITE $0000

READ $0004

DATA

I/O

OUTPUT

INTERNAL HC05

DATA BUS

RESET

(RST)

WRITE $0004

DATA DIRECTION

TO IRQ

INTERRUPT SYSTEM

VDD

PULLUP MASK

OPTION REGISTER

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC705P6AGRS/D 数据表(PDF) 50 Page - NXP Semiconductors

HC705P6AGRS/D 数据表(HTML) 50 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载