DSP56303 datasheet(288/292 Pages) FREESCALE

288 / 292 page

DSP56303 User’s Manual, Rev. 2

Index-10

Freescale Semiconductor

Index

Receive Last Slot Interrupt Enable (RLIE) bit 7-18

Receive Request Enable (RREQ) bit 6-23

Receive Shift Register 7-28

Receive Slot Mask Registers (RSMA and RSMB) 7-12

7-32

Receive with Exception Interrupt Enable (REIE) bit 8-11

Received Bit 8 (R8) bit 8-15

Receiver Enable (RE) bit 8-13

Receiver Overrun Error Flag (ROE) 7-27

Receiver Wakeup Enable (RWU) bit 8-13

RESET 2-8

resets

hardware and software 6-3

ROM, bootstrap 1-5

, 3-1, 3-2

Rounding Mode (RM) bit 4-8

RX clock 7-10

RXH, RXM, RXL registers 6-26

Scaling (S) bit 4-10

Scaling (S) Mode bits 4-10

SCI Clock Control Register (SCCR) 8-8

, 8-17

bit definitions 8-17

Clock Divider (CD) 8-17

Clock Out Divider (COD) 8-17

Clock Prescaler (SCP) 8-17

programming sheet B-27

Receive Clock Mode Source (RCM) 8-17

Transmit Clock Source (TCM) 8-17

SCI Clock Polarity (SCKP) bit 8-11

SCI Control Register (SCR) 8-8

, 8-10

bit definitions 8-11

Idle Line Interrupt Enable (ILIE) 8-12

programming sheet B-26

Receive with Exception Interrupt Enable (REIE) 8-11

Receiver Enable (RE) 8-13

Receiver Wakeup Enable (RWU) 8-13

SCI Clock Polarity (SCKP) 8-11

SCI Receive Interrupt Enable (RIE) 8-12

SCI Shift Direction (SSFTD) 8-14

SCI Transmit Interrupt Enable (TIE) 8-12

Send Break (SBK) 8-14

Timer Interrupt Enable (TMIE) 8-11

Timer Interrupt Rate (STIR) 8-11

Transmitter Enable (TE) 8-12

Wakeup Mode Select (WAKE) 8-13

Wired-OR Mode Select (WOMS) 8-13

Word Select (WDS) 8-14

SCI Interrupt Priority Level (SCL) bits 4-16

SCI pins

RXD, TXD, SCLK 8-3

SCI Receive Data Register (SRX) 8-8

, 8-20

SCI Receive Interrupt Enable (RIE) bit 8-12

SCI Serial Clock signal (SCLK) 8-4

SCI Shift Direction (SSFTD) 8-14

SCI Status Register (SSR) 8-8

, 8-15

bit definitions 8-15

Framing Error Flag (FE) 8-15

Idle Line Flag (IDLE) 8-16

Overrun Error Flag (OR) 8-16

Parity Error (PE) 8-15

Receive Data Register Full (RDRF) 8-16

Received Bit 8 (R8) 8-15

Transmit Data Register Empty (TDRE) 8-16

Transmitter Empty (TRNE) 8-16

SCI Transmit Data Address Register (STXA) 8-9

SCI Transmit Data Register (STX or STXA) 8-19

SCI Transmit Data Register (STX) 8-8

, 8-21

SCI Transmit Interrupt Enable (TIE) bit 8-12

SCLK 8-2

, 8-6

SCS byte 4-12

Select SCK (SSC1) bit 7-13

Send Break (SBK) bit 8-14

Serial Clock (SCK) 7-3

Serial Clock (SCLK), SCI 8-2

Serial Communications Interface (SCI) 1-13

, 2-2, 2-17

Address Mode Wakeup 8-3

Asynchronous mode 8-2

bootstrap loading 8-7

crystal frequency 8-6

data registers 8-19

Data Word Formats 8-9

enable wakeup function 8-13

enable/disable SCI receive data with exception

interrupt 8-11

exceptions 8-8

Idle Line 8-8

Receive Data 8-8

Receive Data with Exception Status 8-8

Timer 8-8

Transmit Data 8-8

GPIO 5-7

GPIO functionality 8-22

I/O signals 8-3

Idle Line Wakeup mode 8-3

individual reset state (PCR = $0) 8-6

initialization 8-6

Inter-processor messages 8-2

interrupts 8-6

Multidrop mode 8-2

operating mode 8-1

Asynchronous 8-1

Synchronous 8-1

programming model 8-8

data registers 8-20

Receive Data (RXD) 8-4

recover synchronization 8-2

reset 8-4

DSP56303 数据表(PDF) 288 Page - Freescale Semiconductor, Inc

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