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TNETA1570 数据表(PDF) 18 Page - Texas Instruments

部件名 TNETA1570
功能描述  ATM SEGMENTATION AND REASSEMBLY DEVICE WITH INTEGRATED 64-BIT PCI-HOST INTERFACE
PDF  68 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

TNETA1570 数据表(HTML) 18 Page - Texas Instruments

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TNETA1570
ATM SEGMENTATION AND REASSEMBLY DEVICE
WITH INTEGRATED 64BIT PCIHOST INTERFACE
SDNS033B − JUNE 1995 − REVISED MAY 1996
18
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251−1443
operating characteristics (see Figure 9)
NO.
MIN†
MAX†
UNIT
1
tw(CMWEL)
Pulse duration, CMWE low
28
31
ns
2
td(CMWE)1
Delay time, CMAD17 − CMAD0 valid to CMWE
↓
12
15
ns
3
td(CMWE)2
Delay time, CMDATA31 − CMDATA0 valid to CMWE
↑
10
14
ns
4
td(CMDATA)
Delay time, CMWE
↑ to CMDATA31−CMDATA0 invalid
15
19
ns
† These values are for full-duplex operation at 33 MHz.
CMOE
(output)
CMAD17 −
CMAD0
(output)
2
CMDATA31 −
CMDATA0
(output)
1
4
Valid
Valid
Invalid
CMWE
(output)
3
Figure 9. Control-Memory-Interface Write Operation
timing requirements (see Figure 10)
NO.
MIN†
MAX
UNIT
1
tsu(CMDATA)
Setup time, CMDATA31 − CMDATA0 valid before CMOE
↑
10
ns
2
th(CMDATA)
Hold time, CMDATA31 − CMDATA0 valid after CMOE
↑
0
ns
† These values are for full-duplex operation at 33 MHz.
operating characteristics (see Figure 10)
NO.
MIN
MAX
UNIT
3
td(CMOE)
Delay time, CMAD17 − CMAD0 valid to CMOE
↓
3
ns
CMWE
(output)
CMAD17−
CMAD0
(output)
3
CMDATA31−
CMDATA0
(input)
Valid
Valid
CMOE
(output)
1
2
Figure 10. Control-Memory-Interface Read Operation



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