TNETA1570 datasheet(40/68 Pages) TI1

40 / 68 page

TNETA1570

ATM SEGMENTATION AND REASSEMBLY DEVICE

WITH INTEGRATED 64BIT PCIHOST INTERFACE

SDNS033B − JUNE 1995 − REVISED MAY 1996

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

PRINCIPLES OF OPERATION

RX-free buffer-ring pointer (bits 31 −2)

This field holds the 30 most significant bits of the base address of the RX free-buffer rings in host memory. The

two least significant bits are always assumed to be zero. This field is initialized by the host.

word 1

Buffer Size (bits 31 − 16)

Ring Size (bits 15 − 10)

Current Index (bits 9 − 0)

buffer size (bits 31−16)

This field gives the size of the buffers associated with this free-buffer ring in number of ATM cells. This field is

set by the host at initialization.

ring size (bits 15 −10)

This field is set by the host at initialization and gives the number of entries in the free-buffer ring in multiples of

16. The maximum number of entries in a free-buffer ring is 1024. The actual value for the ring size can be found

by shifting the value in the ring-size field left four places and filling the lower four bits with 1s. Shifting

000 00 111 left four places gives a value of 000 00 111111. For example, a value of 000 0011 indicates that the

ring contains 64 entries (3 x 16 +15 = 63 +1 = 64) (the last 1 is needed to account for the zero entry).

The value for the ring-size field is found by: [(ring_size/16) − 1]. For a ring size of 16, the value of the ring-size

field in word 1 is 0.

current index (bits 9 −0)

This field is set to all zeroes by the host at initialization and contains the entry in the currently active free-buffer

ring. This field is updated after it is read by the TNETA1570 and the new value written back to control memory.

When the value in the current index exceeds the ring-size value, indicating that the end of the ring has been

reached, the current index is reset to all zeroes.

receive free-buffer ring/receive free-buffer FIFO

receive free-buffer ring

Addressing

The value in the free-buffer ring-pointer table is used to form the address.

Size

Max logical entries: 1024

Min logical entries: 16

32-bit words: 1024

Max number of rings supported: 256

Min number of rings supported: 0 (only use free-buffer FIFO)

receive free-buffer FIFO

Addressing

The value in the RX DMA state table is used to form the address.

Size

Logical entries: 1

The TNETA1570 is able to fetch receive free buffers by using one of two possible methods. The first method

uses multiple free-buffer rings, up to a maximum of 256. The free-buffer ring pointers are maintained in control

memory. The number of entries in the free-buffer rings is programmable. Each entry in the RX DMA state-table

contains a pointer to the free-buffer ring associated with that particular RX DMA state-table entry. When the

TNETA1570 accesses the free-buffer ring entry, it reads the address of an available receive free buffer. The size

of the receive free buffer is contained in the receive free-buffer ring-pointer-table entry in control memory.

The second method uses a FIFO-based mechanism. Each entry in the RX DMA state table contains an address

pointer to a FIFO located in the host-memory space. When the TNETA1570 reads the contents of the FIFO

located at the given address, the starting address of an available buffer is returned. For the FIFO-based

mechanism, the size of the receive free buffer is programmed through an internal register. All buffers used with

this mechanism must be the same size.

TNETA1570 数据表(PDF) 40 Page - Texas Instruments

TNETA1570 数据表(HTML) 40 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

数据表下载