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TNETA1570 数据表(PDF) 44 Page - Texas Instruments

部件名 TNETA1570
功能描述  ATM SEGMENTATION AND REASSEMBLY DEVICE WITH INTEGRATED 64-BIT PCI-HOST INTERFACE
PDF  68 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

TNETA1570 数据表(HTML) 44 Page - Texas Instruments

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TNETA1570
ATM SEGMENTATION AND REASSEMBLY DEVICE
WITH INTEGRATED 64BIT PCIHOST INTERFACE
SDNS033B − JUNE 1995 − REVISED MAY 1996
44
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251−1443
PRINCIPLES OF OPERATION
VALID (bit 31)
The VALID bit is set to 1, except when the start-of-packet pointer is not valid. This condition occurs if a cell is
received on a DMA channel that is in buffer starvation, (i.e., when reassembly has started and the first buffer
in a packet is not available.
start-of-packet pointer (bits 29 −0)
This word provides the location of the first data-buffer in the receive data-buffer chain. This word is copied
directly from word 4 of the RX DMA state table. Only the upper 30 bits of the 32-bit address are copied to this
entry.
word 3 (AAL5 trailer)
CPCS-UU (bits 31 − 24)
CPI (bits 23 − 16)
Length (bits 15 − 0)
AAL5 trailer (bits 31 −0)
The CPCS-UU field, the CPI field, and the length field from the AAL5 trailer of an incoming packet are copied
to this entry. This field is valid only in AAL5 mode.
word 4
Control (bits 31 − 30)
FIFO-Pointer/Ring-Descriptor Index (bits 29 − 0)
OWN (bit 31)
This bit is set to a one by the host to indicate that this entry is available for use by the TNETA1570. If the OWN
bit is not set when the TNETA1570 tries to access an entry, RX freeze occurs. The TNETA1570 clears this bit
to indicate that it has completed the entry and that the entry is ready for the host to evaluate.
error entry (bit 30)
This bit is set by the TNETA1570 when one or more of the error conditions indicated by bits 27−31 of word 1
occur.
FIFO-pointer/ring-descriptor index (bits 29 −0)
This field is copied from word 6 of the receive DMA state table. The value of this field is used by the host to
determine which ring/FIFO the ring is to be returned to when the buffers has been read.
word 5
Reserved (bits 31 − 0)
reserved (bits 31 −0)
This word is not used by the TNETA1570 and reserved for future revisions of the TNETA1570.
word 6
Reserved (bits 31 − 0)
reserved (bits 31 −0)
This word is not used by the TNETA1570 and reserved for future revisions of the TNETA1570.
word 7
Reserved (bits 31 − 0)
reserved (bits 31 −0)
This word is not used by the TNETA1570 and reserved for future revisions of the TNETA1570.



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