TNETA1570 datasheet(48/68 Pages) TI1

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TNETA1570

ATM SEGMENTATION AND REASSEMBLY DEVICE

WITH INTEGRATED 64BIT PCIHOST INTERFACE

SDNS033B − JUNE 1995 − REVISED MAY 1996

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

PRINCIPLES OF OPERATION

RESDATA(bits 7 −0)

Data (TXDATA) input. RESDATA7 is the MSB.

RESPAR

Parity (TXPAR) input. RESPAR is the odd-parity bit over RESDATA.

RESSOC

Start of cell (TXSOC) input. This active-high signal is received by the TNETA1570 when RESDATA contains

the first valid byte of the cell.

RESEN

Enable (TXENB) input. This active-low signal is received by the TNETA1570 when RESDATA contains a valid

byte.

RESCLAV

Full/cell available (TXFULL /TXCLAV) output. An indication that a transfer of a complete cell can be accepted.

RESPERR

Parity error output (not required by the UTOPIA specification). This active-low signal asserted by the

reassembly unit to indicate that parity error was present at the previous rising RESCLK edge.

segmentation-unit interface, ATM mode

The segmentation-unit interface on the TNETA1570 outputs TXDATA on the UTOPIA interface in ATM mode.

This cell interface works on the low-to-high transition of SEGCLK to sample and generate signals. All signals

are active high unless denoted via a bar over the signal name.

SEGCLK

Clock (TXCLK) input. Data transfer/synchronization clock for synchronizing transfers on SEGDATA. When

operating in ATM mode, the SEGCLK is sourced from the ATMCLK.

SEGDATA (bits 7 −0)

Data (TXDATA) output. Byte-wide true data sourced by the TNETA1570 SEGDATA7 is the MSB.

SEGPAR

Parity (TXPRTY) output. SEGPAR is the odd-parity bit over SEGDATA.

SEGSOC

Start of cell (TXSOC) output. Active-high signal sourced by the TNETA1570 when SEGDATA contains the first

valid byte of the cell.

SEGEN

Full/cell available (TXFULL /RXCLAV) input. (Functional description does not match pin name for ATM mode)

An indication that at least one byte of SEGDATA is accepted.

SEGCLAV

Enable (TXENB) output. (Functional description does not match pin name for ATM mode). This active-low signal

is sent by the TNETA1570 when SEGDATA contains a valid byte.

reassembly-unit interface, ATM mode

The reassembly-unit interface on the TNETA1570 inputs RXDATA from the UTOPIA interface in ATM mode.

This receive cell interface works on the low-to-high transition of RESCLK to sample and generate signals. All

signals are active high, unless denoted via a bar over the signal name.

TNETA1570 数据表(PDF) 48 Page - Texas Instruments

TNETA1570 数据表(HTML) 48 Page - Texas Instruments

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