TNETA1570 datasheet(39/68 Pages) TI1

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TNETA1570

ATM SEGMENTATION AND REASSEMBLY DEVICE

WITH INTEGRATED 64BIT PCIHOST INTERFACE

SDNS033B − JUNE 1995 − REVISED MAY 1996

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

PRINCIPLES OF OPERATION

word 6

ON (bit 31)

FILTER (bit 30)

Free-Buffer FIFO Pointer/RX Free-Buffer Pointer-Table Entry Index (bits 29 − 0)

ON (bit 31)

When this bit is set, packet reassembly is enabled for this receive DMA channel. OAM cells can only be received

on DMA channels with the ON bit set (=1). This bit must be set by the host at initialization and not be turned off

during ongoing reassembly of a packet, as data buffers might be lost.

FILTER (bit 30)

This bit is only valid when the ON bit = 0 for the DMA channel. When the FILTER bit is set (= I), the following

happens: The cell is dropped, no interrupts are generated, and the unknown protocol counter is not

incremented. When the FILTER bit is not set (= 0), the following happens: The cell is dropped, the ATM header

is posted in the RX unknown register, interrupts are generated as they are done if the VCI is out of range, and

the unknown-protocol counter is incremented.

free-buffer FIFO pointer/RX free-buffer pointer-table index (bits 29 −0)

This entry contains either the address of the FIFO free-buffer entry or an index to the RX free-buffer ring-pointer

table contained in control memory. Only the lower eight bits are used if the RX free-buffer rings are selected.

The upper 22 bits remain unchanged and retain the initialized value. The free-buffer FIFO

pointer/descriptor-index field must be initialized by the host only at startup.

word 7

Reserved (bit 31)

Reserved (bits 30 − 24)

Time-Out Value (bits 23 − 12)

Time-Out Count (bits 11 − 0)

time-out value (bits 23 −12)

This field contains the value at which a reassembly time-out occurs. This field must be set at initialization.

time-out count (bits 11 −0)

This field is incremented if the reassembly-aging mechanism has reached this DMA channel and the RX DMA

channel is ACTive. If the value in this field is equal to the time-out value, a reassembly time-out is declared and

EOP processing is initiated. This field is reset at SOP.

receive free-buffer ring-pointer table

Addressing

In control memory. The entries are addressed using the RX DMA-state-table entry.

Size

Logical entries: 256

32-bit words: 512

The receive free-buffer ring-pointer table resides in control memory and provides the addresses of the next

entries in the receive free-buffer rings. There are a maximum of 256 free-buffer rings. The size of the receive

free-buffer rings are programmable. The entries for the receive free-buffer ring-pointer table are shown below:

ENTRY

DESCRIPTION

Word 0

RX free-buffer ring pointer

Word 1

Ring size, buffer size

The definitions of the fields associated with each word entry are given below:

word 0

RX Free-Buffer Ring Pointer (bits 31 − 2)

Reserved (bits 1 − 0)

TNETA1570 数据表(PDF) 39 Page - Texas Instruments

TNETA1570 数据表(HTML) 39 Page - Texas Instruments

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