AM79C971VCW datasheet(113/265 Pages) AMD

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Am79C971

113

mapping can be done anywhere

in the 32-bit memory space.

MEMSPACE Memory space indicator. Read

as zero; write operations have no

effect. Indicates that this base ad-

dress register describes a memo-

ry base address.

PCI Subsystem Vendor ID Register

Offset 2Ch

The PCI Subsystem Vendor ID register is a 16-bit reg-

ister that together with the PCI Subsystem ID uniquely

identifies the add-in card or subsystem the Am79C971

controller is used in. Subsystem Vendor IDs can be ob-

tained from the PCI SIG. A value of 0 (the default) indi-

cates that the Am79C971 controller does not support

subsystem identification. The PCI Subsystem Vendor

ID is an alias of BCR23, bits 15-0. It is programmable

through the EEPROM.

The PCI Subsystem Vendor ID register is located at off-

set 2Ch in the PCI Configuration Space. It is read only.

PCI Subsystem ID Register

Offset 2Eh

The PCI Subsystem ID register is a 16-bit register that

together with the PCI Subsystem Vendor ID uniquely

identifies the add-in card or subsystem the Am79C971

controller is used in. The value of the Subsystem ID is

up to the system vendor. A value of 0 (the default) indi-

cates that the Am79C971 controller does not support

subsystem identification. The PCI Subsystem ID is an

alias of BCR24, bits 15-0. It is programmable through

the EEPROM.

The PCI Subsystem ID register is located at offset 2Eh

in the PCI Configuration Space. It is read only.

PCI Expansion ROM Base Address Register

Offset 30h

The PCI Expansion ROM Base Address register is a

32-bit register that defines the base address, size and

address alignment of an Expansion ROM. It is located

at offset 30h in the PCI Configuration Space.

Bit

Name

Description

31-20

ROMBASE Expansion ROM base address

most significant 12 bits. These

bits are written by the host to

specify the location of the Expan-

sion ROM in all of memory space.

ROMBASE must be written with a

valid

address

before

the

Am79C971 Expansion ROM ac-

cess

enabled

setting

ROMEN (PCI Expansion ROM

Base Address register, bit 0) and

MEMEN (PCI Command register,

bit 1).

Since the 12 most significant bits

of the base address are program-

mable, the host can map the Ex-

pansion

ROM

any

boundary.

When the Am79C971 controller

is enabled for Expansion ROM

access (ROMEN and MEMEN

are set to 1), it monitors the PCI

bus for a valid memory com-

mand. If the value on AD[31:2]

during the address phase of the

cycle falls between ROMBASE

and ROMBASE + 1M - 4, the

Am79C971 controller will drive

DEVSEL indicating it will respond

to the access.

ROMBASE is read and written by

the host. ROMBASE is cleared

by H_RESET and is not affected

by S_RESET or by setting the

STOP bit.

19-1

ROMSIZE

ROM size. Read as zeros; write

operation have no effect. ROM-

SIZE indicates the maximum size

the

Expansion

ROM

the

Am79C971 controller can sup-

port. The host can determine the

Expansion ROM size by writing

FFFF FFFFh to the Expansion

ROM Base Address register. It

will read back a value of 0 in bit

19-1, indicating an Expansion

ROM size of 1M.

Note that ROMSIZE only speci-

fies the maximum size of Expan-

sion

ROM

the

Am79C971

controller supports. A smaller

ROM can be used, too. The actu-

al size of the code in the Expan-

sion ROM is always determined

by reading the Expansion ROM

header.

ROMEN

Expansion ROM Enable. Written

by the host to enable access to

the

Expansion

ROM.

The

Am79C971 controller will only re-

spond to accesses to the Expan-

sion ROM when both ROMEN

and MEMEN (PCI Command reg-

ister, bit 1) are set to 1.

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