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AM79C971VCW 数据表(PDF) 149 Page - Advanced Micro Devices |
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AM79C971VCW 数据表(HTML) 149 Page - Advanced Micro Devices |
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149 / 265 page ![]() Am79C971 149 P R E L I M INARY Note that several registers have no default value. BCR0, BCR1, BCR3, BCR8, BCR10-17, and BCR21 are reserved and have undefined values. BCR2 and BCR34 are not observable without first being pro- grammed through the EEPROM read operation or a user register write operation. BCR0, BCR1, BCR16, BCR17, and BCR21 are regis- ters that are used by other devices in the PCnet family. Writing to these registers have no effect on the opera- tion of the Am79C971 controller. Writes to those registers marked as “Reserved” will have no effect. Reads from these locations will produce undefined values. BCR0: Master Mode Read Active Bit Name Description 31-16 RES Reserved locations. Written as zeros and read as undefined. 15-0 MSRDA Reserved locations. After H_RESET, the value in this regis- ter will be 0005h. The setting of this register has no effect on any Am79C971 controller function. It is only included for software com- patibility with other PCnet family devices. Read always. MSRDA is read only. Write operations have no ef- fect. Table 30. BCR Registers RAP Mnemonic Default Name Programmability User EEPROM 0 MSRDA 0005h Reserved No No 1 MSWRA 0005h Reserved No No 2 MC 0002h Miscellaneous Configuration Yes Yes 3 Reserved N/A Reserved No No 4 LED0 00C0h LED0 Status Yes Yes 5 LED1 0084h LED1 Status Yes Yes 6 LED2 0088h LED2 Status Yes Yes 7 LED3 0090h LED3 Status Yes Yes 8 Reserved N/A Reserved No No 9 FDC 0000h Full-Duplex Control Yes Yes 10-15 Reserved N/A Reserved No No 16 IOBASEL N/A Reserved No No 17 IOBASEU N/A Reserved No No 18 BSBC 9001h Burst and Bus Control Yes Yes 19 EECAS 0002h EEPROM Control and Status Yes No 20 SWS 0000h Software Style Yes No 21 INTCON N/A Reserved No No 22 PCILAT FF06h PCI Latency Yes Yes 23 PCISID 0000h PCI Subsystem ID No Yes 24 PCISVID 0000h PCI Subsystem Vendor ID No Yes 25 SRAMSIZ 0000h SRAM Size Yes Yes 26 SRAMB 0000h SRAM Boundary Yes Yes 27 SRAMIC 0000h SRAM Interface Control Yes Yes 28 EBADDRL N/A Expansion Bus Address Lower Yes No 29 EBADDRU N/A Expansion Bus Address Upper Yes No 30 EBD N/A Expansion Bus Data Port Yes No 31 STVAL FFFFh Software Timer Value Yes No 32 MIICAS 0000h MII Control and Status Yes Yes 33 MIIADDR 0000h MII Address Yes Yes 34 MIIMDR N/A MII Management Data Yes No 35 PCIVID 1022h PCI Vendor ID No Yes |
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