AM79C971VCW datasheet(154/265 Pages) AMD

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154

Am79C971

P R E L I M INARY

PSE

Pulse Stretcher Enable. When

this bit is set, the LED illumination

time is extended for each new oc-

currence of the enabled function

for this LED output. A value of 0

disables the pulse stretcher.

Read/Write accessible always.

PSE is set to 1 by H_RESET and

is not affected by S_RESET or

setting the STOP bit.

LNKSE

Link Status Enable. When this bit

is set, a value of 1 will be passed

to the LEDOUT bit in this register

when the T-MAU mode is in Link

Pass state. When the T-MAU is in

Link Fail state, a value of 0 is

passed to the LEDOUT bit. This

bit does not reflect the link status

of the external PHY.

The function of this bit is masked

if the 10BASE-T port is operating

in full-duplex mode. This allows a

Half-Duplex Link Status LED and

a Full-Duplex Link Status LED at

the same time.

Read/Write accessible always.

LNKSE is set to 1 by H_RESET

and is not affected by S_RESET

or setting the STOP bit.

RCVME

Receive Match Status Enable.

When this bit is set, a value of 1 is

passed to the LEDOUT bit in this

tivity on the network that has

passed the address match func-

tion for this node. All address

matching modes are included:

physical, logical filtering, broad-

cast and promiscuous.

Read/Write accessible always.

RCVME is cleared by H_RESET

and is not affected by S_RESET

or setting the STOP bit.

XMTE

Transmit Status Enable. When

this bit is set, a value of 1 is

passed to the LEDOUT bit in this

activity on the network.

Read/Write accessible always.

XMTE is cleared by H_RESET

and is not affected by S_RESET

or setting the STOP bit.

RXPOLE

Receive Polarity Status Enable.

When this bit is set, a value of 1 is

passed to the LEDOUT bit in this

RXD

± pair has not been re-

versed.

Receive polarity indication is val-

id only if the T-MAU is in link pass

state.

Read/Write accessible always.

RXPOLE is cleared by H_RESET

and is not affected by S_RESET

or setting the STOP bit.

RCVE

Receive Status Enable. When

this bit is set, a value of 1 is

passed to the LEDOUT bit in this

tivity on the network.

Read/Write accessible always.

RCVE is cleared by H_RESET

and is not affected by S_RESET

or setting the STOP bit.

JABE

Jabber Status Enable. When this

bit is set, a value of 1 is passed to

the LEDOUT bit in this register

when the Am79C971 controller is

jabbering on the network.

Read/Write accessible always.

JABE is cleared by H_RESET

and is not affected by S_RESET

or setting the STOP bit.

COLE

Collision Status Enable. When

this bit is set, a value of 1 is

passed to the LEDOUT bit in this

activity on the network. The activ-

ity on the collision inputs to the

AUI ports within the first 4

µs after

every transmission for the pur-

pose of SQE testing will not

cause the LEDOUT bit to be set.

Read/Write accessible always.

COLE is cleared by H_RESET

and is not affected by S_RESET

or setting the STOP bit.

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