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EM357-RTR 数据表(PDF) 175 Page - Silicon Laboratories |
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EM357-RTR 数据表(HTML) 175 Page - Silicon Laboratories |
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175 / 241 page  175 Rev 1.3 Table 10.3 shows the typical configurations of ADC inputs. Table 10.2. ADC Inputs ADC_MUXn* Analog Source at ADC GPIO Pin Purpose 0 ADC0 PB5 1 ADC1 PB6 2 ADC2 PB7 3 ADC3 PC1 4 ADC4 PA4 5 ADC5 PA5 6 No connection 7 No connection 8 GND Internal connection Calibration 9 VREF/2 Internal connection Calibration 10 VREF Internal connection Calibration 11 VDD_PADSA/2 Internal connection Supply monitoring and calibration 12 No connection 13 No connection 14 No connection 15 No connection *Note: Denotes bits ADC_MUXP or ADC_MUXN in register ADC_CFG. Table 10.3. Typical ADC Input Configurations ADC P Input ADC N Input ADC_MUXP ADC_MUXN Purpose ADC0 VREF/2 0 9 Single-ended ADC1 VREF/2 1 9 Single-ended ADC2 VREF/2 2 9 Single-ended ADC3 VREF/2 3 9 Single-ended ADC4 VREF/2 4 9 Single-ended ADC5 VREF/2 5 9 Single-ended ADC1 ADC0 1 0 Differential ADC3 ADC2 3 2 Differential ADC5 ADC4 5 4 Differential GND VREF/2 8 9 Calibration VREF VREF/2 10 9 Calibration VDD_PADSA/2 VREF/2 11 9 Calibration |
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