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TNETV2664FIBZWT 数据表(PDF) 101 Page - Texas Instruments |
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TNETV2664FIBZWT 数据表(HTML) 101 Page - Texas Instruments |
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101 / 249 page  TMS320C6424 www.ti.com SPRS347D – MARCH 2007 – REVISED DECEMBER 2009 Table 3-20. Host Block Muxed Pins Selection MULTIPLEXED FUNCTIONS SIGNAL NAME HPI EMAC(MII)/MDIO VLYNQ PCI GPIO FUNCTION SELECT FUNCTION SELECT FUNCTION SELECT FUNCTION SELECT FUNCTION SELECT PCIEN = 0, and HOSTBK = 000 VLYNQ_CLOCK/PCICLK/GP[57] – – – – VLYNQ_CLOCK PCICLK GP[57] or HOSTBK = 001 or HOSTBK = 100 HD0/VLYNQ_SCRUN/AD18/GP[58] HD0 – – VLYNQ_SCRUN AD18 GP[58] PCIEN = 0, HD1/VLYNQ_RXD0/AD16/GP[59] HD1 – – VLYNQ_RXD0 and AD16 GP[59] HOSTBK = 010 HD2/VLYNQ_RXD1/AD17/GP[60] HD2 – – VLYNQ_RXD1 AD17 GP[60] or PCIEN = 0, HOSTBK = 011 HD3/VLYNQ_RXD2/PCBE2/GP[61] HD3 – – VLYNQ_RXD2 PCBE2 GP[61] and HD4/VLYNQ_RXD3/PFRAME/GP[62] HD4 – – VLYNQ_RXD3 PFRAME GP[62] HOSTBK = 000 or HD5/VLYNQ_TXD0/PIRDY/GP[63] HD5 – – VLYNQ_TXD0 PIRDY GP[63] HOSTBK = 100 HD6/VLYNQ_TXD1/PTRDY/GP[64] HD6 – – VLYNQ_TXD1 PTRDY GP[64] HD7/VLYNQ_TXD2/PDEVSEL/GP[65] HD7 – – VLYNQ_TXD2 PDEVSEL GP[65] HD8/VLYNQ_TXD3/PPERR/GP[66] HD8 – – VLYNQ_TXD3 PPERR GP[66] HD9/MCOL/PSTOP/GP[67] HD9 MCOL – – PSTOP GP[67] PCIEN = 1, HD10/MCRS/PSERR/GP[68] HD10 MCRS – – PSERR GP[68] and HOSTBK = 000 HD11/MTXD3/PCBE1/GP[69] HD11 MTXD3 – – PCBE1 GP[69] PCIEN = 0, HD12/MTXD2/PPAR/GP[70] HD12 MTXD2 – – PPAR GP[70] and HD13/MTXD1/AD14/GP[71] HD13 MTXD1 – – AD14 GP[71] HOSTBK = 001 HD14/MTXD0/AD15/GP[72] HD14 MTXD0 – – AD15 GP[72] HD15/MTXCLK/AD12/GP[73] HD15 MTXCLK – – AD12 GP[73] PCIEN = 0, PCIEN = 0, HHWIL/MRXDV/AD13/GP[74] HHWIL MRXDV – – AD13 GP[74] and and HCNTL1/MTXEN/AD11/GP[75] HCNTL1 MTXEN HOSTBK = 011 – – AD11 GP[75] HOSTBK = 000 or or HCNTL0/MRXER/AD10/GP[76] HCNTL0 MRXER – – AD10 GP[76] HOSTBK = 100 HOSTBK = 010 HR/W/MRXCLK/AD8/GP[77] HR/W MRXCLK – – AD8 GP[77] HDS2/MRXD0/AD9/GP[78] HDS2 MRXD0 – – AD9 GP[78] HDS1/MRXD1/AD7/GP[79] HDS1 MRXD1 – – AD7 GP[79] HRDY/MRXD2/PCBE0/GP[80] HRDY MRXD2 – – PCBE0 GP[80] HCS/MDCLK/AD5/GP[81] HCS MDCLK – – AD5 GP[81] HINT/MRXD3/AD6/GP[82] HINT MRXD3 – – AD6 GP[82] HAS/MDIO/AD3/GP[83] HAS MDIO – – AD3 GP[83] Copyright © 2007–2009, Texas Instruments Incorporated Device Configurations 101 Submit Documentation Feedback Product Folder Link(s): TMS320C6424 |
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