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ST7DALIF2 数据表(PDF) 115 Page - STMicroelectronics

部件名 ST7DALIF2
功能描述  Configurable watchdog timer
PDF  171 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST7DALIF2 数据表(HTML) 115 Page - STMicroelectronics

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ST7DALIF2
10-bit A/D converter (ADC)
115/171
RAIN is the maximum recommended impedance for an analog input signal. If the impedance
is too high, this will result in a loss of accuracy due to leakage and sampling not being
completed in the alloted time.
18.3.4
A/D conversion
The analog input ports must be configured as input, no pull-up, no interrupt. Refer to
Section 12: I/O ports on page 61. Using these pins as analog inputs does not affect the
ability of the port to be read as a logic input.
In the ADCCSR register:
– Select the CS[2:0] bits to assign the analog channel to convert.
ADC conversion mode
In the ADCCSR register:
Set the ADON bit to enable the A/D converter and to start the conversion. From this
time on, the ADC performs a continuous conversion of the selected channel.
When a conversion is complete:
The EOC bit is set by hardware.
The result is in the ADCDR registers.
A read to the ADCDRH or a write to any bit of the ADCCSR register resets the EOC bit.
To read the 10 bits, perform the following steps:
1.
Poll EOC bit
2.
Read ADCDRL
3.
Read ADCDRH. This clears EOC automatically.
To read only 8 bits, perform the following steps:
1.
Poll EOC bit
2.
Read ADCDRH. This clears EOC automatically.
18.4
Changing the conversion channel
The application can change channels during conversion.
When software modifies the CH[3:0] bits in the ADCCSR register, the current conversion is
stopped, the EOC bit is cleared, and the A/D converter starts converting the newly selected
channel.
18.5
Low power modes
Note:
The A/D converter may be disabled by resetting the ADON bit. This feature allows reduced
power consumption when no conversion is needed and between single shot conversions.



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