| 数据搜索系统,热门电子元器件搜索 |
|
ST10F296 数据表(PDF) 76 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
ST10F296 数据表(HTML) 76 Page - STMicroelectronics |
|
76 / 346 page ![]() Obsolete Product(s) - Obsolete Product(s) The bootstrap loader ST10F296E 76/346 This process may go through several iterations or may directly execute the final application. In all cases, the ST10F296E runs in BSL mode, i.e. with the watchdog timer disabled and limited access to the internal Flash area. All code fetches from the internal IFlash area (01’0000H...08’FFFFH) are redirected to the special Test-Flash. Data read operations access the internal Flash of the ST10F296E, if any is available, but return undefined data on ROM-less devices. 6.3.5 Choosing the baud rate for the BSL via UART The calculation of the serial baud rate for ASC0 from the length of the first zero byte that is received, allows the bootstrap loader of the ST10F296E to operate with a wide range of baud rates. However, upper and lower limits have to be respected to insure proper data transfer. Equation 1 The ST10F296E uses Timer T6 to measure the length of the initial zero byte. The quantization uncertainty of this measurement implies the first deviation from the real baud rate. The next deviation is implied by the computation of the S0BRL reload value from the timer contents. Equation 2 below shows the association: Equation 2 Where: For correct data transfer from the host to the ST10F296E, the maximum deviation between the internal initialized baud rate for ASC0 and the real baud rate of the host should be below 2.5 %. The deviation (FB, in percent) between host baud rate and the ST10F296E baud rate can be calculated via Equation 3: Equation 3 where: FB ≤ 2.5 % Note: FB does not consider the tolerances of oscillators and other devices supporting the serial communication. This baud rate deviation is a nonlinear function depending on the CPU clock and the baud rate of the host. The maxima of FB increases with the host baud rate due to the smaller baud rate pre-scaler factors and the implied higher quantization error (see Figure 11). B ST10F296 f CPU 32 SOBRL 1 + () × ⁄ = SOBRL T6 36 – () 72 ⁄ = T6 9 4 ⁄ f CPU B Host ⁄ × = F B B Contr B Host – () B Contr ⁄ 100 × = Obsolete Product(s) - Obsolete Product(s) |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |