ST10F296 datasheet(34/346 Pages) STMICROELECTRONICS

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Memory organization

ST10F296E

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4.2

XFlash

XFlash comprises 320 Kbytes of on-chip extension Flash memory. The XFLASH address

range is 09’0000h - 0E’FFFFh if enabled (if the XPEN bit, bit 2, of the SYSCON register and

the XFLASHEN bit, bit 5, of the XPERCON register are set ). If the XPEN bit is cleared, any

access in the address range 09’0000h - 0E’FFFFh is directed to the external memory

interface, using the BUSCONx register corresponding to an address matching the

ADDRSELx register. When the XPEN bit is set, but the XFLASHEN and XRAM2EN bits are

cleared.

Note:

When the Flash control registers are not accessible, no program/erase operations are

possible.

XFlash is divided into 3 blocks (B2F0...B0F2) of Bank 2, and two blocks of Bank 3 (B3F0,

B3F1). Read-while-write operations inside the same bank are not allowed. Flash control

registers are mapped in the range 0E’0000h - 0E’FFFFh. The summary of address range for

XFLASH is given in Table 4.

The XFlash is accessed like an external memory in 16-bit demultiplexed bus-mode without

read/write delay. The user must set the proper number of waitstates according to the system

frequency (1 waitstate for fCPU higher than 40 MHz, 0 waitstates otherwise). Refer to the

XFICR register described in Section 5: Internal Flash memory on page 42). Byte and word

access is allowed.

Note:

When the ROMEN and XPEN bits in the SYSCON register are set, together with at least

one of the XFLASHEN or XRAM2EN bits in the XPERCON register, the address 08’0000h -

08’FFFFh must be reserved (no external memory access is enabled).

4.3

Internal RAM (IRAM)

2 Kbytes of on-chip IRAM (dual-port) is provided as a storage for data, system stack,

general purpose register bank and code. A register bank includes 16 wordwide (R0 to R15)

and/or bytewide (RL0, RH0, …, RL7, RH7) general purpose registers.

Table 4.

Address ranges for IFlash

Blocks

User Mode

Size (Kbytes)

B2F0

09’0000h - 09’FFFFh

B2F1

0A’0000h - 0A’FFFFh

B2F2

0B’0000h - 0B’FFFFh

B3F0

0C’0000h - 0C’FFFFh

B3F1

0D’0000h - 0D’FFFFh

CTRL Registers

0E’0000h - 0E’FFFFh

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