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ST10F296 数据表(PDF) 39 Page - STMicroelectronics |
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ST10F296 数据表(HTML) 39 Page - STMicroelectronics |
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39 / 346 page  Obsolete Product(s) - Obsolete Product(s) ST10F296E Memory organization 39/346 4.16 XPeripheral configuration registers XPERCON register XPERCON (F024h/12h) ESFR Reset value: 005h 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 -- - - XPORT EN XMISC EN XI2C EN XSSC EN XASC EN XPWM EN XFLASH EN XRTC EN XRAM 2EN XRAM 1EN CAN 2EN CAN 1EN - - - - RW RW RW RW RW RW RW RW RW RW RW RW Table 5. XPERCON register description BIt Bit name Function 11 XPORTEN XPort 9 and XPort 10 enable bit 0: Access to the on-chip XPort 9 and XPort 10 modules is disabled. Address range 00’EB80h to 00’EBFFh is directed to the external memory only if CAN1EN, CAN2EN, XRTCEN, XASCEN, XSSCEN, XPWMEN, XI2CEN and XMISCEN are also 0. 1: The on-chip XPort 9 and XPort 10 are enabled and can be accessed. 10 XMISCEN XBus additional features and XTimer enable bit 0: Access to the additional miscellaneous features is disabled. Address range 00’EB00h to 00’EB7Fh is directed to the external memory only if CAN1EN, CAN2EN, XRTCEN, XASCEN, XSSCEN, XPWMEN, XI2CEN and XPORTEN are also 0. 1: The additional features and XTimer are enabled and can be accessed. 9XI2CEN I2C enable bit 0: Access to the on-chip I2C is disabled, external access performed. Address range 00’EA00h to 00’EAFFh is directed to the external memory only if CAN1EN, CAN2EN, XRTCEN, XASCEN, XSSCEN, XPWMEN, XMISCEN and XPORTEN are also 0. 1: The on-chip I2C is enabled and can be accessed. 8 XSSCEN SSC1 enable bit 0: Access to the on-chip SSC1 is disabled, external access performed. Address range 00’E800h to 00’E8FFh is directed to the external memory only if CAN1EN, CAN2EN, XRTCEN, XASCEN, XI2CEN, XPWMEN, XMISCEN and XPORTEN are also 0. 1: The on-chip SSC1 is enabled and can be accessed. 7 XASCEN ASC1 enable bit 0: Access to the on-chip ASC1 is disabled, external access performed. Address range 00’E900h to 00’E9FFh is directed to the external memory only if CAN1EN, CAN2EN, XRTCEN, XASCEN, XI2CEN, XPWMEN, XMISCEN and XPORTEN are also 0. 1: The on-chip ASC1 is enabled and can be accessed. 6 XPWMEN XPWM enable 0: Access to the on-chip PWM1 module is disabled, external access is performed. Address range 00’EC00h to 00’ECFF is directed to the external memory only if CAN1EN, CAN2EN, XASCEN, XSSCEN, XI2CEN, XRTCEN, XMISCEN and XPORTEN are also 0. 1: The on-chip PWM1 module is enabled and can be accessed. Obsolete Product(s) - Obsolete Product(s) |
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