ST10F296 datasheet(48/346 Pages) STMICROELECTRONICS

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ST10F296E

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Flash control register 0 high (FCR0H)

The Flash control register 0 high (FCR0H) together with the Flash control register 0 low

(FCR0L) is used to enable and monitor write operations for both the Flash modules. The

user has no access in write mode to the Test-Flash (B0TF). The Test-Flash block is only

seen by the user in bootstrap mode.

FCR0H (0x0E 0002)

FCR

Reset value: 0000h

WMS SUSP WPG DWPG

SER

Reserved

SPR SMOD

Reserved

Table 12.

FCR0H register decription

Bit

Bit name

Function

WMS

Write mode start

This bit must be set to start every write operation in the Flash modules. At

the end of the write operation or during a suspend, this bit is automatically

reset. To resume a suspended operation, this bit must be set again. It is

forbidden to set this bit if the ERR bit of the FER register is high (the

operation is not accepted). It is also forbidden to start a new write (program

or erase) operation (by setting the WMS bit high) when the SUSP bit of the

FCR0 register is high. Resetting this bit by software has no effect.

SUSP

Suspend

This bit must be set to suspend the current program (word or double word)

or sector erase operation to read data in one of the sectors of the bank

under modification or to program data in another bank. The suspend

operation resets the Flash bank to normal read mode (automatically

resetting bits BSYx). When in program suspend, the two Flash modules

accept only read and program resume operations. When in erase suspend,

the modules accept only read, erase resume, and program (word or double

word) operations. Program operations cannot be suspended during erase

suspend. To resume the suspended operation, the WMS bit must be set

again, together with the selection bit corresponding to the operation to

resume (WPG, DWPG, SER).

Note: It is forbidden to start a new write operation with the SUSP bit already

set.

WPG

Word program

This bit must be set to select the word (32 bits) program operation in the

Flash modules. The word program operation allows 0s to be programmed

instead of 1s. The Flash address to be programmed must be written in the

FARH/L registers, while the Flash data to be programmed must be written

in the FDR0H/L registers before starting the execution by setting the WMS

bit. The WPG bit is automatically reset at the end of the word program

operation.

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