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ST10F296 数据表(PDF) 51 Page - STMicroelectronics

部件名 ST10F296
功能描述  High performance 16-bit CPU with DSP functions
PDF  346 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST10F296 数据表(HTML) 51 Page - STMicroelectronics

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Obsolete
Product(s)
- Obsolete
Product(s)
ST10F296E
Internal Flash memory
51/346
Flash control register 1 high (FCR1H)
The Flash control register 1 high (FCR1H) and the Flash control register 1 low (FCR1L) are
used to select the sectors to erase, or they are used, during any write operation, to monitor
the status of each sector and each bank of the module selected by the SMOD bit of the
FCR0H register. FCR1H is shown below when SMOD = 0 and when SMOD = 1.
FCR1H (0x0E 0006) SMOD = 0
FCR
Reset value: 0000h
15
14
13
12
11
10
9
8
76
5432
1
0
Reserved
B3S
B2S
Reserved
B3F1 B3F0
-
RS
RS
-RS
RS
Table 15.
FCR1H register description (SMOD = 0, XFlash selected)
BIt
Bit name
Function
15-10
-
Reserved
9-8
B[3:2]S
Bank 3-2 status (XFlash)
During any erase operation, these bits are automatically modified and
give the status of the two banks, B3-B2. The meaning of the BxS bit for
Bank x is given in Table 17. Bits B[3:2]S are automatically reset at the
end of a erase operation if no errors are detected.
7-2
-
Reserved
1-0
B3F[1:0]
Bank 3 XFlash sector 1:0 status
During any erase operation, these bits are automatically set and give
the status of the two sectors of Bank 3 (B3F1-B3F0). The meaning of
B3Fy bit for sector y of Bank 1 is given in Table 17. Bits B3F[1:0] are
automatically reset at the end of a erase operation if no errors are
detected.
Obsolete
Product(s)
- Obsolete
Product(s)



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