ST10F296 datasheet(121/346 Pages) STMICROELECTRONICS

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ST10F296E

Parallel ports

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13.1

I/O special features

13.1.1

Open-drain mode

Some of the I/O ports of the ST10F296E support the open-drain capability. This

programmable feature may be used with an external pull-up resistor to get an AND wired

logical function.

This feature is implemented for ports P2, P3, P4, P6, P7, P8, and XP9 (see Section 13.4,

Section 13.5, Section 13.6, Section 13.8, Section 13.9, Section 13.10, and Section 13.11)

and is controlled through the respective open-drain control registers ODPx (and the XODP9

mode for each port line. If the respective control bit ODPx.y is 0 (default after reset), the

output driver is in the push-pull mode. If ODPx.y is 1, the open-drain configuration is

selected (see Figure 30). All ODPx registers are located in the ESFR space. The XODP9

13.1.2

Input threshold control

The standard inputs of the ST10F296E determine the status of input signals according to

TTL levels. To accept and recognize noisy signals, CMOS input thresholds can be selected

instead of standard TTL thresholds for all pins. CMOS thresholds are defined above the TTL

thresholds and feature a higher hysteresis to prevent inputs from toggling while the

respective input signal level is near its threshold.

All options for individual direction and output mode control are available for each pin,

independent of the selected input threshold. The input hysteresis provides stable inputs

from noisy or slowly changing external signals (see Figure 31).

13.1.3

I/0 port registers

The port input control registers, PICON and XPICON, are used to select thresholds for each

byte of the indicated ports. This means the 8-bit ports P0L, P0H, P1L, P1H, P4, P7, and P8

are controlled by one bit each while ports P2, P3, and P5 are controlled by two bits each. In

addition, the registers XPICON9 and XPICON10 allow single bit input threshold control for

XP9 and XP10 respectively.

For XPort 9 and XPort 10, the bit-addressable feature is available via specific ‘set’ and ‘clear’

registers. These are:

●

XPICON9SET and XPICON9CLR for XPICON9

●

XPICON10SET and XPICON10CLR for XPICON10

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