LSM6DSV datasheet(179/187 Pages) STMICROELECTRONICS

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Table 109. UI_OUTZ_G_OIS_EIS register description ................................................. 79

Table 110. UI_OUTX_L_A_OIS_DualC register ...................................................... 80

Table 111. UI_OUTX_H_A_OIS_DualC register...................................................... 80

Table 112. UI_OUTX_A_OIS_DualC register description ............................................... 80

Table 113. UI_OUTY_L_A_OIS_DualC register ...................................................... 80

Table 114. UI_OUTY_H_A_OIS_DualC register...................................................... 80

Table 115. UI_OUTY_A_OIS_DualC register description ............................................... 80

Table 116. UI_OUTZ_L_A_OIS_DualC register ...................................................... 81

Table 117. UI_OUTZ_H_A_OIS_DualC register...................................................... 81

Table 118. UI_OUTZ_A_OIS_DualC register description................................................ 81

Table 119. TIMESTAMP output registers .......................................................... 81

Table 120. TIMESTAMP output register description ................................................... 81

Table 121. UI_STATUS_REG_OIS register ......................................................... 82

Table 122. UI_STATUS_REG_OIS register description ................................................. 82

Table 123. WAKE_UP_SRC register ............................................................. 82

Table 124. WAKE_UP_SRC register description ..................................................... 82

Table 125. TAP_SRC register .................................................................. 83

Table 126. TAP_SRC register description .......................................................... 83

Table 127. D6D_SRC register .................................................................. 84

Table 128. D6D_SRC register description .......................................................... 84

Table 129. EMB_FUNC_STATUS_MAINPAGE register ................................................ 85

Table 130. EMB_FUNC_STATUS_MAINPAGE register description ........................................ 85

Table 131. FSM_STATUS_MAINPAGE register ...................................................... 85

Table 132. FSM_STATUS_MAINPAGE register description .............................................. 85

Table 133. INTERNAL_FREQ_FINE register........................................................ 86

Table 134. INTERNAL_FREQ_FINE register description................................................ 86

Table 135. ODRcoeff values .................................................................... 86

Table 136. FUNCTIONS_ENABLE register ......................................................... 87

Table 137. FUNCTIONS_ENABLE register description ................................................. 87

Table 138. DEN register ...................................................................... 88

Table 139. DEN register description .............................................................. 88

Table 140. Trigger mode selection ............................................................... 88

Table 141. INACTIVITY_DUR register ............................................................ 89

Table 142. INACTIVITY_DUR register description .................................................... 89

Table 143. INACTIVITY_THS register ............................................................ 89

Table 144. INACTIVITY_THS register description .................................................... 89

Table 145. TAP_CFG0 register ................................................................. 90

Table 146. TAP_CFG0 register description ......................................................... 90

Table 147. TAP_CFG1 register ................................................................. 91

Table 148. TAP_CFG1 register description ......................................................... 91

Table 149. TAP priority decoding ................................................................ 91

Table 150. TAP_CFG2 register ................................................................. 91

Table 151. TAP_CFG2 register description ......................................................... 91

Table 152. TAP_THS_6D register ............................................................... 92

Table 153. TAP_THS_6D register description ....................................................... 92

Table 154. Threshold for D4D/D6D function ........................................................ 92

Table 155. TAP_DUR register .................................................................. 93

Table 156. TAP_DUR register description .......................................................... 93

Table 157. WAKE_UP_THS register.............................................................. 93

Table 158. WAKE_UP_THS register description ..................................................... 93

Table 159. WAKE_UP_DUR register ............................................................. 94

Table 160. WAKE_UP_DUR register description ..................................................... 94

Table 161. FREE_FALL register ................................................................ 94

Table 162. FREE_FALL register description ........................................................ 94

Table 163. Threshold for free-fall function .......................................................... 94

LSM6DSV

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DS13476 - Rev 2

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