ST7DALIF2 datasheet(162/171 Pages) STMICROELECTRONICS

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Device configuration

ST7DALIF2

162/171

Note:

When the internal RC oscillator is selected, the OSCRANGE option bits must be kept at

their default value in order to select the 256 clock cycle delay (see Section 9.6).

OPT3:2 = SEC[1:0] Sector 0 size definition

These option bits indicate the size of sector 0 according to the following table.

OPT1 = FMP_R Readout protection

Readout protection, when selected provides a protection against program memory content

extraction and against write access to Flash memory. Erasing the option bytes when the

FMP_R option is selected will cause the whole memory to be erased first and the device can

be reprogrammed. Refer to the ST7 Flash Programming Reference Manual and Section 6.5

on page 21 for more details

0: Readout protection off

1: Readout protection on

OPT0 = FMP_W FLASH write protection

This option indicates if the FLASH program memory is write protected.

Caution:

When this option is selected, the program memory (and the option bit itself) can never be

erased or programmed again.

0: Write protection off

1: Write protection on

22.1.2

Option byte 1

OPT7 = PLLx4x8 PLL Factor selection.

0: PLLx4

1: PLLx8

OPT6 = PLLOFF PLL disable.

0: PLL enabled

1: PLL disabled (by-passed)

OPT5 = PLL32OFF 32MHz PLL disable.

0: PLL32 enabled

1: PLL32 disabled (by-passed)

OPT4 = OSC RC Oscillator selection

0: RC oscillator on

1: RC oscillator off

Note:

If the RC oscillator is selected, then to improve clock stability and frequency accuracy, it is

recommended to place a decoupling capacitor, typically 100 nF, between the VDD and VSS

pins as close as possible to the ST7 device.

Table 96.

Program memory sector size configuration

Sector 0 Size

SEC1

SEC0

0.5k

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