ST10F296 datasheet(115/346 Pages) STMICROELECTRONICS

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Pulse-width modulation (PWM) modules

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12.1

XPWM output signals

The output signals of the four XPWM channels (XPOUT3...XPOUT0) are available as

dedicated pins. The XPWM signals are XORed with the outputs of the XPOLAR register

before being driven to the dedicated pins. This allows the XPWM signal (XPOLAR.x = 0) or

the inverted XPWM signal (XPOLAR.x = 1) to be driven directly.

Note:

Using open-drain mode allows two or more XPWM outputs to be combined through an

AND-wired configuration, using an external pull-up device. This provides a type of burst

mode for any XPWM channel.

12.2

XPWM registers

XPOLAR register

The XPWMPORT register controls the specific XPWM output pins. Each output can be

enabled/disabled which allows the XPWM to be configured as a push-pull or open-drain

driver. In addition, the signal coming from the XPOLAR register is inverted. If both

XPOLAR.Y and XP.y are set, no inversion is achieved.

Table 58.

PWM unit frequencies and resolution at 64 MHz CPU clock

Mode 0

Resolution

8-bit

10-bit

12-bit

14-bit

16-bit

CPU clock/1

15.6 ns

250 kHz

62.5 kHz

15.63 kHz

3.91 Hz

977 Hz

CPU clock/64

1.0 µs

3.91 kHz

976.6 Hz

244.1 Hz

61.01 Hz

15.26 Hz

Mode 1

Resolution

8-bit

10-bit

12-bit

14-bit

16-bit

CPU clock/1

15.6 ns

125 kHz

31.25 kHz

7.81 kHz

1.95 kHz

488.3 Hz

CPU clock/64

1.0 µs

1.95 kHz

488.28 Hz

122.07 Hz

30.52 Hz

7.63 Hz

XPOLAR (EC04h)

XBus

Reset value: 0000h

7654

3210

Reserved

XPO

LAR.3

XPO

LAR.2

XPO

LAR.1

XPO

LAR.0

RWRWRWRW

Table 59.

XPOLAR register description

Bit

Bit name

Function

15-4

Reserved

3-0

XPOLAR.Y

XPWM channel Y polarity bit

0: Polarity of channel Y is normal

1: Polarity of channel Y is inverted

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