 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
ST10F296 数据表(PDF) 134 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
ST10F296 数据表(HTML) 134 Page - STMicroelectronics |
|
|
134 / 346 page  Obsolete Product(s) - Obsolete Product(s) Parallel ports ST10F296E 134/346 ODP2 register 13.4.2 Alternate functions of Port 2 All Port 2 lines (P2.15 to P2.0) can be configured as capture inputs or compare outputs (CC15IO to CC0IO) for the CAPCOM1 unit. When a Port 2 line is used as a capture input, the state of the input latch, which represents the state of the port pin, is directed to the CAPCOM unit via the line ‘alternate pin data input’. If an external capture trigger signal is used, the direction of the respective pin must be set to input. If the direction is set to output, the state of the port output latch is read since the pin represents the state of the output latch. This may trigger a capture event through software by setting or clearing the port latch. Note that in the output configuration, no external device may drive the pin, otherwise conflicts occur. When a Port 2 line is used as a compare output (compare modes 1 and 3), the compare event (or the timer overflow in compare mode 3) directly affects the port output latch. In compare mode 1, when a valid compare match occurs, the state of the port output latch is read by the CAPCOM control hardware via the line ‘alternate latch data input’. It is inverted and written back to the latch via the line ‘alternate data output’. The port output latch is clocked by the signal ‘compare trigger’ which is generated by the CAPCOM unit. In compare mode 3, when a match occurs, the value 1 is written to the port output latch via the line ‘alternate data output’. When an overflow of the corresponding timer occurs, a 0 is written to the port output latch. In both cases, the output latch is clocked by the signal ‘compare trigger’. The direction of the pin should be set to output by the user, otherwise the pin is in the high impedance state and does not reflect the state of the output latch. As can be seen from the port structure (Figure 37), the user software always has free access to the port pin even when it is used as a compare output. This is useful for setting up the initial level of the pin when using compare mode 1 or the double-register mode. In these modes, unlike in compare mode 3, the pin is not set to a specific value when a compare match occurs. It is toggled instead. When the user wants to write to the port pin at the same time a compare trigger tries to clock the output latch, the write operation of the user software has priority. Each time a CPU write access to the port output latch occurs, the input multiplexer of the port output latch is switched to the line connected to the internal bus. The port output latch receives the value from the internal bus and the hardware triggered change is lost. ODP2 (F1C2h/E1h) ESFR Reset value: 0000h 15 14 13 12 11 10 987 65432 10 OD P2 .15 OD P2 .14 OD P2 .13 OD P2 .12 OD P2 .11 OD P2 .10 OD P2 .9 OD P2 .8 OD P2 .7 OD P2 .6 OD P2 .5 OD P2 .4 OD P2 .3 OD P2 .2 OD P2 .1 OD P2 .0 RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW Table 73. ODP2 register description Bit Bit name Function 15-0 ODP2.y Port open-drain control register ODP2 bit y 0: Port line P2.y output driver in push-pull mode 1: Port line P2.y output driver in open-drain mode Obsolete Product(s) - Obsolete Product(s) |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
