AM79C971VCW datasheet(172/265 Pages) AMD

172 / 265 page

172

Am79C971

P R E L I M INARY

mended to program the value of

18H via EEPROM. MAX_LAT is

not affected by S_RESET or

STOP.

7-0

MIN_GNT

Minimum Grant. Specifies the

minimum length of a burst period

the Am79C971 controller needs

to keep up with the network activ-

ity. The length of the burst period

is calculated assuming a clock

rate of 33 MHz. The register val-

ue specifies the time in units of 1/

µs. MIN_GNT is aliased to the

PCI configuration space register

MIN_GNT (offset 3Eh). The host

will use the value in the register to

determine

the

setting

the

Am79C971 Latency Timer regis-

ter.

Read accessible always; write

accessible only when either the

STOP or the SPND bit is set.

MIN_GNT is set to the value of

06h by H_RESET which results

in a default minimum grant of

1.5

µs, which is the time it takes

the Am79C971 controller to read/

write half of the FIFO. (16 DWord

transfers in burst mode with one

extra wait state per data phase

inserted by the target.) Note that

the default is only a typical value.

It also does not take into account

any descriptor accesses. It is rec-

ommended to program the value

of 18H via EEPROM. MIN_GNT

is not affected by S_RESET or

STOP.

BCR23: PCI Subsystem Vendor ID Register

Note: Bits 15-0 in this register are programmable

through the EEPROM.

Bit

Name

Description

31-16 RES

Reserved locations. Written as

zeros and read as undefined.

15-0

SVID

Subsystem Vendor ID. SVID is

used together with SID (BCR24,

bits 15-0) to uniquely identify the

add-in board or subsystem the

Am79C971 controller is used in.

Subsystem Vendor IDs can be

obtained from the PCI SIG. A val-

ue of 0 (the default) indicates that

the Am79C971 controller does

not support subsystem identifica-

tion. SVID is aliased to the PCI

configuration space register Sub-

system Vendor ID (offset 2Ch).

Read accessible always. SVID is

read only. Write operations are

ignored. SVID is cleared to 0 by

H_RESET and is not affected by

S_RESET or by setting the STOP

bit.

BCR24: PCI Subsystem ID Register

Note: Bits 15-0 in this register are programmable

through the EEPROM.

Bit

Name

Description

31-16 RES

Reserved locations. Written as

zeros and read as undefined.

15-0

SID

Subsystem ID. SID is used to-

gether with SVID (BCR23, bits

15-0) to uniquely identify the add-

board

subsystem

the

Am79C971 controller is used in.

The value of SID is up to the sys-

tem vendor. A value of 0 (the de-

fault)

indicates

that

the

Am79C971 controller does not

support subsystem identification.

SID is aliased to the PCI configu-

ration space register Subsystem

ID (offset 2Eh).

Read accessible always. SID is

read only. Write operations are

ignored. SID is cleared to 0 by

H_RESET and is not affected by

S_RESET or by setting the STOP

bit.

BCR25: SRAM Size Register

Bit

Name

Description

Note: Bits 7-0 in this register are programmable

through the EEPROM.

31-8

RES

Reserved locations. Written as

zeros and read as undefined.

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