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ADP1050ACPZ-R7 数据表(PDF) 32 Page - Analog Devices

部件名 ADP1050ACPZ-R7
功能描述  Versatile digital voltage mode controller
PDF  93 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP1050ACPZ-R7 数据表(HTML) 32 Page - Analog Devices

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Data Sheet
ADP1050
In the overvoltage detection block, there is an internal analog
comparator to detect the output voltage and generate the VOUT_
OV_FAULT flag when an overvoltage condition occurs. The over-
voltage reference voltage is set in Register 0x40. The debounce
time of the flag setting can be programmed for 0 μs, 1 μs, 2 μs, or
8 μs, using Register 0xFE26[7:6]. There is also a 40 ns propagation
delay, which is measured from the time when the OVP voltage
exceeds the threshold to the time when the comparator output
status is changed.
In the modulation flag triggering block, the real-time modulation
value is compared to the internal reference to generate the
LARGE_MODULATION flag. Register 0xFE6C[2] sets the
LARGE_MODULATION flag when the real-time modulation
value exceeds the modulation threshold set by Register 0xFE6B.
In the overvoltage responses block, there are two groups of over-
voltage protection responses: the VOUT_OV_FAULT_RESPONSE
PMBus command, set in Register 0x41, and the extended VOUT_
OV_FAULT_RESPONSE, set in Register 0xFE01[7:4].
There is a conditional OVP enable switch in Register 0xFE6C[0].
If the switch is cleared to 0, the conditional OVP function is
disabled and the OVP response always follows the VOUT_OV_
FAULT_RESPONSE PMBus command (Register 0x41). If the
switch is set to 1, the OVP response follows the VOUT_OV_
FAULT_RESPONSE command or the extended VOUT_OV_
FAULT_RESPONSE, depending on the status of the LARGE_
MODULATION flag.
For example, when using a direct parallel system, if the VS+ pin
(Pin 3) and the VS− pin (Pin 2) in one power supply unit (PSU)
are shorted and this PSU experiences overvoltage failure, all the
PSUs detect the overvoltage signal. The LARGE_MODULATION
flag is used to identify the failed PSU. Typically, the failed PSU is
shut down, and the other PSUs continue to operate normally.
The modulation threshold is typically set with a value that is
slightly less than the modulation limit setting in Register 0xFE3C;
however, the modulation limit can change when the ADP1050 unit
acts as a slave device to synchronize with an external clock (see the
Switching Frequency and Synchronization Registers section for
more information).
For more information about extended overvoltage protection,
see the Manufacturer Specific Protection Responses section and
the related register settings.
VOUT Undervoltage Protection (UVP)
The VOUT undervoltage protection feature follows PMBus specifi-
cations. The limits are programmed using the VOUT_UV_
FAULT_LIMIT command (Register 0x44), and the responses are
programmed in the VOUT_UV_FAULT_RESPONSE command
(Register 0x45). When the voltage reading in the READ_VOUT
command (Register 0x8B) falls below the VOUT_UV_FAULT_
LIMIT value, the VOUT_UV_FAULT flag in Register 0x7A[4]
is set.
During the period of the soft start ramp, the turn-on delay time
is specified by the TON_DELAY command (Register 0x60), and
the flag reenable delay time is specified by Register 0xFE05[7:6].
The VOUT_UV_FAULT flag is always blanked. Under these
conditions, the VOUT_UV_FAULT flag is never triggered by an
undervoltage condition.
OT_FAULT and OT_WARNING
The overtemperature protection feature in the ADP1050 follows
PMBus specifications. With the default setting, the OTP limit
is programmed using the OT_FAULT_LIMIT command in
Register 0x4F, and the response is programmed using the
OT_FAULT_RESPONSE command (Register 0x50).
There is an overtemperature warning flag, OT_WARNING,
in Register 0x7D[6]. The OT_WARNING limit is less than the
OT_FAULT_LIMIT, with an overtemperature hysteresis specified
by Register 0xFE2F[1:0].
When the temperature sensed at the RTD pin (Pin 20) exceeds the
OT_WARNING limit, the OT_WARNING flag (Register 0x7D[6])
is set. When the temperature sensed at RTD pin exceeds the
OT_FAULT_LIMIT, the OT_FAULT flag (Register 0x7D[7]) is set.
The OT_FAULT and OT_WARNING flags are cleared when the
temperature falls below the OT_WARNING limit (see Figure 34).
The OT_FAULT flag and the OT_WARNING flag can each be
separately set to trigger the PGOOD flag and drive the PG/ALT
pin (Pin 14) low.
TIME
OT_FAULT_LIMIT
OT_WARNING LIMIT
OT HYSTERESIS
OT_FAULT FLAG IS SET
OT_WARNING
FLAG IS SET
OT_FAULT AND OT_WARNING
FLAGS ARE CLEARED
OT_FAULT FLAG
OT_WARNING FLAG
Figure 34. OT Protection and OT Warning Operation
Optionally, the user can process the RTD reading and use the
linearization equation to determine the overtemperature
protection setting. This allows the user to program the RTD
threshold for greater overtemperature protection accuracy.
Alternatively, if an analog temperature sensor, such as the STLM20,
is used, the OT_FAULT limit can still be programmed using the
OT_FAULT_LIMIT command (Register 0x4F), but a conversion
equation is needed.
Rev. A | Page 31 of 92



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