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ADP1050ACPZ-R7 数据表(PDF) 50 Page - Analog Devices |
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ADP1050ACPZ-R7 数据表(HTML) 50 Page - Analog Devices |
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50 / 93 page  Data Sheet ADP1050 MANUFACTURER SPECIFIC EXTENDED COMMAND LIST Table 12. Manufacturer Specific Extended Command List Overview Address Register Function Flag Configuration Registers 0xFE00 IIN_OC_FAST_FAULT_RESPONSE 0xFE01 CS3_OC_FAULT_RESPONSE, extended VOUT_OV_FAULT_RESPONSE 0xFE02 VIN_UV_FAULT_RESPONSE 0xFE03 FLAGIN_RESPONSE 0xFE05 Flag reenable delay, VDD_OV_RESPONSE Soft Start Software Reset Setting Registers 0xFE06 Software reset go command 0xFE07 Software reset settings 0xFE08 Synchronous rectifier (SR) soft start settings 0xFE09 Soft start setting of open-loop operation Blanking and PGOOD Setting Registers 0xFE0B Flag blanking during soft start 0xFE0C Volt-second balance blanking and SR disable during soft start 0xFE0D PGOOD mask settings 0xFE0E PGOOD flag debounce 0xFE0F Debounce time for asserting PGOOD Switching Frequency and Synchronization Setting Registers 0xFE11 Synchronization delay time 0xFE12 Synchronization general settings 0xFE13 Dual-ended topology mode Current Sense and Limit Setting Registers 0xFE14 CS1 gain trim 0xFE19 CS3 OC debounce 0xFE1A IIN_OC_FAST_FAULT_LIMIT 0xFE1B CS1 cycle-by-cycle current limit reference 0xFE1D Matched cycle-by-cycle current-limit settings 0xFE1E SR1 and SR2 response to cycle-by-cycle current limit 0xFE1F CS1 cycle-by-cycle current-limit settings Voltage Sense and Limit Setting Registers 0xFE20 VS gain trim 0xFE25 Prebias start-up enable 0xFE26 VOUT_OV_FAULT flag debounce 0xFE28 VF gain trim 0xFE29 VIN_ON and VIN_OFF delay Temperature Sense and Protection Setting Registers 0xFE2A RTD gain trim 0xFE2B RTD offset trim (MSBs) 0xFE2C RTD offset trim (LSBs) 0xFE2D RTD current source settings 0xFE2F OT hysteresis settings Digital Compensator and Modulation Setting Registers 0xFE30 Normal mode compensator low frequency gain settings 0xFE31 Normal mode compensator zero settings 0xFE32 Normal mode compensator pole settings 0xFE33 Normal mode compensator high frequency gain settings 0xFE38 CS1 threshold for volt-second balance 0xFE39 Nominal modulation value for prebias startup 0xFE3A SR driver delay 0xFE3B PWM 180° phase shift settings 0xFE3C Modulation limit 0xFE3D Feedforward and soft start filter gain Rev. A | Page 49 of 92 |
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