ADP1050ACPZ-R7 datasheet(78/93 Pages) AD

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Data Sheet

ADP1050

Table 115. Register 0xFE1B—CS1 Cycle-by-Cycle Current-Limit Reference

Bits

Bit Name/Function

R/W

Description

Reserved

R/W

Reserved.

CS1 cycle-by-cycle

current-limit ref

R/W

0 = the CS1 cycle-by-cycle current-limit reference is 1.2 V.

1 = the CS1 cycle-by-cycle current-limit reference is 0.25 V.

[5:0]

Reserved

R/W

Reserved.

Table 116. Register 0xFE1D—Matched Cycle-by-Cycle Current-Limit Settings

Bits

Bit Name/Function

R/W

Description

Reserved

R/W

Reserved.

Enable matched cycle-

by-cycle current limit

R/W

Setting this bit enables the matched cycle-by-cycle current-limit function.

[5:2]

Reserved

R/W

Reserved.

OUTB rising edge

blanking

R/W

This bit specifies whether the blanking time for the CS1 cycle-by-cycle current-limit

comparator is referenced to the rising edge of OUTB.

0 = no blanking at the OUTB rising edge.

1 = blanking time referenced to the OUTB rising edge.

OUTA rising edge

blanking

R/W

This bit specifies whether the blanking time for the CS1 cycle-by-cycle current-limit

comparator is referenced to the rising edge of OUTA.

0 = no blanking at the OUTA rising edge.

1 = blanking time referenced to the OUTA rising edge.

Table 117. Register 0xFE1E—SR1 and SR2 Response to Cycle-by-Cycle Current Limit

Bits

Bit Name/Function

R/W

Description

[7:2]

Reserved

R/W

Reserved.

SR2 response to cycle-

by-cycle current limit

R/W

This bit is applicable only when the SR2 output is programmed to be in complement with the OUTA

output. When this bit is set and there is a cycle-by-cycle current limit, the SR2 rising edge is turned on

when the cycle-by-cycle current limit disables the OUTA. Its falling edge still follows the

programmed value.

SR1 response to cycle-

by-cycle current limit

R/W

This bit is applicable only when the SR1 output is programmed to be in complement with the OUTB

output. When this bit is set and there is a cycle-by-cycle current limit, the SR1 rising edge is turned on

when the cycle-by-cycle current limit disables the OUTB. Its falling edge still follows the

programmed value.

Rev. A | Page 77 of 92

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