TNETV2664FIBZWT datasheet(107/249 Pages) TI1

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TMS320C6424

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SPRS347D – MARCH 2007 – REVISED DECEMBER 2009

As discussed in Section 3.7.3.2, Peripherals Spanning Multiple Pin Mux Blocks, the McBSP0 pins span

across two Pin Mux Blocks: Serial Port Sub-Block0, and Timer0 Block. For proper McBSP0 operation, the

Serial Port Sub-Block0 must be programmed to select McBSP0 function. The McBSP0 CLKS0 pin in the

Timer0 Block is optional for McBSP0 operation. CLKS0 is only needed if you desire using CLKS0 as an

external clock source to the McBSP0 internal sample rate generator.

Similarly, as discussed in Section 3.7.3.2, Peripherals Spanning Multiple Pin Mux Blocks, the McBSP1

pins span across two Pin Mux Blocks: Serial Port Sub-Block1, and Timer0 Block. For proper McBSP1

operation, the Serial Port Sub-Block1 must be programmed to select McBSP1 function. The McBSP1

CLKS1 pin in the Timer0 Block is optional for McBSP1 operation. CLKS1 is only needed if you desire

using CLKS1 as an external clock source to the McBSP1 internal sample rate generator.

Table 3-30 provides a different view of the Timer0 Block pin muxing, showing the Timer0 Block function

based on PINMUX1.TIM0BK setting. The selection options are also shown pictorially in Figure 3-10.

Table 3-30. Timer0 Block Function Selection

PINMUX1.TIM0BK

BLOCK FUNCTION

RESULTING PIN FUNCTIONS

GPIO (2) (default)

GPIO: GP[98:97]

Timer0

Timer0: TINP0L, TOUT0L

McBSP0 External Clock Source,

McBSP0: CLKS0

McBSP1 External Clock Source

McBSP1: CLKS1

McBSP0 External Clock Source,

McBSP0: CLKS0

Timer0 Input

Timer0: TINP0L

In addition, the VDD3P3V_PWDN.TIMER0 field determines the power state of the Timer0 Block pins. The

Timer0 Block pins default to powered down and not operational. To use these pins, user must first

program

VDD3P3V_PWDN.TIMER0

power

the

pins.

For

details

the

VDD3P3V_PWDN.TIMER0 field, see Section 3.2, Power Considerations.

3.7.3.9

Timer1 Block

This block of 2 pins consists of Timer1, UART1 Data, and GPIO muxed pins. The PINMUX1.TIM1BK

Table 3-31 summarizes the 2 pins in the Timer1 Block, the multiplexed function on each pin, and the

PINMUX configurations to select the corresponding function.

Table 3-31. Timer1 Block Muxed Pins Selection

MULTIPLEXED FUNCTIONS

SIGNAL

TIMER1

UART1

GPIO

NAME

FUNCTION

SELECT

FUNCTION

SELECT

FUNCTION

SELECT

TINP1L/

URXD1/

TINP1L

URXD1

GP[56]

TIM1BK = 01

TIM1BK = 10

TIM1BK = 00

TOUT1L/

UTXD1/

TOUT1L

UTXD1

GP[55]

Unlike UART0, UART1 only supports data pins but not flow control pins.

Table 3-32 provides a different view of the Timer1 Block pin muxing, showing the Timer1 Block function

based on PINMUX1.TIM1BK setting. The selection options are also shown pictorially in Figure 3-10.

Table 3-32. Timer1 Block Function Selection

PINMUX1.TIM1BK

BLOCK FUNCTION

RESULTING PIN FUNCTIONS

GPIO (2) (default)

GPIO: GP[56:55]

Timer1

Timer1: TINP1L, TOUT1L

Device Configurations

107

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