LSM6DSV datasheet(102/187 Pages) STMICROELECTRONICS

102 / 187 page

9.73

UI_CTRL1_OIS (70h)

OIS configuration register

The primary interface can write this register when the OIS_CTRL_FROM_UI bit in the FUNC_CFG_ACCESS

(01h) register is equal to 1 (primary IF full control mode); this register is read-only when the

OIS_CTRL_FROM_UI bit is equal to 0 (SPI2 full control mode) and shows the content of the SPI2_CTRL1_OIS

(70h) register.

Table 189. UI_CTRL1_OIS register

0(1)

SIM_OIS

0(1)

OIS_

XL_EN

OIS_

G_EN

SPI2_READ

_EN

1. This bit must be set to 0 for the correct operation of the device.

Table 190. UI_CTRL1_OIS register description

SIM_OIS

SPI2 3- or 4-wire interface. Default value: 0

(0: 4-wire SPI2;

1: 3-wire SPI2)

OIS_XL_EN

Enables accelerometer OIS chain. Default value: 0

(0: accelerometer OIS chain disabled;

1: accelerometer OIS chain enabled)

OIS_G_EN

Enables gyroscope OIS chain. Default value: 0

(0: gyroscope OIS chain disabled;

1: gyroscope OIS chain enabled)

SPI2_READ_EN

In primary IF full control mode, enables auxiliary SPI for reading OIS data

in registers SPI2_OUTX_L_G_OIS (22h) and SPI2_OUTX_H_G_OIS (23h) through

Section 11.9 SPI2_OUTZ_L_A_OIS (2Ch) and SPI2_OUTZ_H_A_OIS (2Dh). Default value: 0

(0: OIS data read from auxiliary SPI disabled;

1: OIS data read from auxiliary SPI enabled)

LSM6DSV

UI_CTRL1_OIS (70h)

DS13476 - Rev 2

page 102/187

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