HC705JJ7GRSSLASHD datasheet(25/230 Pages) NXP

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General Description

VDD and VSS Pins

MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0

General Release Specification

General Description

1.6 VDD and VSS Pins

Power is supplied to the MCU through VDD and VSS. VDD is the positive

supply, and VSS is ground. The MCU operates from a single power

supply.

Very fast signal transitions occur on the MCU pins. The short rise and

fall times place very high short-duration current demands on the power

supply. To prevent noise problems, special care should be taken to

provide good power supply bypassing at the MCU by using bypass

capacitors with good high-frequency characteristics that are positioned

as close to the MCU as possible. Bypassing requirements vary,

depending on how heavily the MCU pins are loaded.

1.7 OSC1 and OSC2 Pins

The OSC1 and OSC2 pins are the connections for the external pin

oscillator (EPO). The OSC1 and OSC2 pins can accept the following

sets of components:

1. A crystal as shown in Figure 1-3 (a)

2. A ceramic resonator as shown in Figure 1-3 (a)

3. An external resistor as shown in Figure 1-3 (b)

4. An external clock signal as shown in Figure 1-3 (c)

The selection of the crystal/ceramic resonator or RC oscillator

configuration is done by product part number selection as described in

Section 17. Ordering Information.

The frequency, fosc, of the EPO or external clock source is divided by two

to produce the internal operating frequency, fOP. An internal 2 MΩ

resistor may be selected between OSC1 and OSC2 by the OSCRES bit

in the mask option register (MOR).

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC705JJ7GRS/D 数据表(PDF) 25 Page - NXP Semiconductors