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HC705JJ7GRS/D 数据表(PDF) 72 Page - NXP Semiconductors |
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HC705JJ7GRS/D 数据表(HTML) 72 Page - NXP Semiconductors |
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72 / 230 page  Operating Modes General Release Specification MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0 Operating Modes Figure 6-2. Stop/Wait/Halt Flowchart STOP SWAIT BIT IN MOR SET? CLEAR I BIT IN CCR. SET IRQE BIT IN ISCR. CLEAR CTOF, RTIF, CTOFE, AND RTIE BITS IN TSCR. DISABLE EXTERNAL PIN OSCILLATOR. EXTERNAL RESET? EXTERNAL INTERRUPT? NO NO NO TURN ON SELECTED OSCILLATOR. RESET STABILIZATION DELAY TIMER. YES YES HALT YES END OF STABILIZATION DELAY? YES NO NO EXTERNAL RESET? CLEAR I BIT IN CCR. SET IRQE BIT IN ISCR. TURN OFF CPU CLOCK. KEEP OTHER MODULE YES WAIT TURN ON CPU CLOCK. 1. LOAD PC WITH RESET VECTOR OR 2. SERVICE INTERRUPT. a. SAVE CPU REGISTERS ON STACK. b. SET I BIT IN CCR. c. LOAD PC WITH INTERRUPT VECTOR. TURN OFF INTERNAL LOW-POWER OSCILLATOR. CLEAR ICF, OCF, AND TOF BITS IN TSR. CLEAR ICIE, OCIE, AND TOIE BITS IN TCR. CLOCKS ACTIVE. NO CORE INTERRUPT? YES TIMER NO EXTERNAL INTERRUPT? YES NO PROG. INTERRUPT? YES TIMER NO SIOP INTERRUPT? YES NO INTERRUPT? YES ANALOG NO COP RESET? YES CLEAR I BIT IN CCR. SET IRQE BIT IN ISCR. TURN OFF CPU CLOCK. KEEP OTHER MODULE CLOCKS ACTIVE. NO EXTERNAL RESET? YES NO CORE INTERRUPT? YES TIMER NO EXTERNAL INTERRUPT? YES NO PROG. INTERRUPT? YES TIMER NO SIOP INTERRUPT? YES NO YES NO COP RESET? YES INTERRUPT? ANALOG Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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