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HC705JJ7GRS/D 数据表(PDF) 27 Page - NXP Semiconductors |
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HC705JJ7GRS/D 数据表(HTML) 27 Page - NXP Semiconductors |
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27 / 230 page ![]() General Description OSC1 and OSC2 Pins MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0 General Release Specification General Description The load capacitance values used in the oscillator circuit design should include all stray capacitances. The ceramic resonator and components should be mounted as close as possible to the pins for startup stabilization and to minimize output distortion. An internal startup resistor of approximately 2 M Ω can be provided between OSC1 and OSC2 for the ceramic resonator type oscillator by use of the OSCRES bit in the MOR. 1.7.3 RC Oscillator The lowest cost oscillator is the RC oscillator configuration where a resistor is connected between the two oscillator pins as shown in Figure 1-3 (b). The internal startup resistor of approximately 2 M Ω is not recommended between OSC1 and OSC2 for the RC-type oscillator. The selection of the RC oscillator configuration is done by product part number selection as described in Section 17. Ordering Information. 1.7.4 External Clock An external clock from another CMOS-compatible device can be connected to the OSC1 input, with the OSC2 input not connected, as shown in Figure 1-3 (c). This oscillator can be selected via software. This configuration is possible regardless of whether the crystal/ceramic resonator or RC oscillator configuration is used. 1.7.5 Internal Low-Power Oscillator An internal low-power oscillator (LPO) is provided which is the default oscillator out of reset. When operating from this internal LPO, the other oscillator can be powered down by software to further conserve power. The selection of the LPO configuration is done by product part number selection as described in Section 17. Ordering Information. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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