HC705JJ7GRSSLASHD datasheet(36/230 Pages) NXP

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Memory

General Release Specification

MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0

Memory

2.5 Interrupt Vector Mapping

The interrupt vectors are contained in the upper memory addresses

above $1FF0 as shown in Figure 2-5.

2.6 RAM

The 224 addresses from $0020 to $00FF serve as both the user RAM

and the stack RAM. The CPU uses five RAM bytes to save all CPU

call, the CPU uses two bytes to store the return address. The stack

pointer decrements during pushes and increments during pulls.

NOTE:

Be careful when using nested subroutines or multiple interrupt levels.

The CPU may overwrite data in the RAM during a subroutine or during

the interrupt stacking operation.

Address

$1FF0

COP Register & EPROM Security

$1FF1

Mask Option Register

$1FF2

Analog Interrupt Vector (MSB)

$1FF3

Analog Interrupt Vector (LSB)

$1FF4

Serial Interrupt Vector (MSB)

$1FF5

Serial Interrupt Vector ((LSB)

$1FF6

Timer Interrupt Vector (MSB)

$1FF7

Timer Interrupt Vector (LSB)

$1FF8

CTimer Interrupt Vector (MSB)

$1FF9

CTimer Interrupt Vector (LSB)

$1FFA

External IRQ Vector (MSB)

$1FFB

External IRQ Vector (LSB)

$1FFC

SWI Vector (MSB)

$1FFD

SWI Vector (LSB)

$1FFE

Reset Vector (MSB)

$1FFF

Reset Vector (LSB)

Figure 2-5. Vector Mapping

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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