HC705JJ7GRSSLASHD datasheet(33/230 Pages) NXP

33 / 230 page

Memory

Input/Output Registers

MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0

General Release Specification

Memory

* Features related to port C are only available on the 28-pin MC68HC705JP7 devices.

Address

$0000

Port A Data Register

$0001

Port B Data Register

$0002

Port C Data Register *

$0003

Analog MUX Register

$0004

Port A Data Direction Register

$0005

Port B Data Direction Register

$0006

Port C Data Direction Register *

$0007

Unused

$0008

Core Timer Status & Control Register

$0009

Core Timer Counter

$000A

Serial Control Register

$000B

Serial Status Register

$000C

Serial Data Register

$000D

IRQ Status & Control Register

$000E

Personality EPROM Bit Select Register

$000F

Personality EPROM Status & Control Register

$0010

Port A and Port C Pulldown Register *

$0011

Port B Pulldown Register

$0012

Timer Control Register

$0013

Timer Status Register

$0014

Input Capture Register (MSB)

$0015

Input Capture Register (LSB)

$0016

Output Compare Register (MSB)

$0017

Output Compare Register (LSB)

$0018

Timer Counter Register (MSB)

$0019

Timer Counter Register (LSB)

$001A

Alternate Counter Register (MSB)

$001B

Alternate Counter Register (LSB)

$001C

EPROM Programming Register

$001D

Analog Control Register

$001E

Analog Status Register

$001F

Reserved

Figure 2-2. I/O Registers

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC705JJ7GRS/D 数据表(PDF) 33 Page - NXP Semiconductors

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