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ADE7878 数据表(PDF) 45 Page - Analog Devices |
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ADE7878 数据表(HTML) 45 Page - Analog Devices |
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45 / 92 page ![]() ADE7878 Rev. 0 | Page 45 of 92 WTHR[47:0] 1 DSP PULSE = 1LSB OF WATTHR[47:0] ACTIVE POWER ACCUMULATION IN DSP DSP GENERATED PULSES Figure 62. Active Power Accumulation Inside DSP Figure 62 explains this process. The WTHR[47:0] 48-bit signed register contains the threshold. It is introduced by the user and is common for all phase total active and fundamental powers. Its value depends on how much energy is assigned to one LSB of watt-hour registers. Supposing a derivative of wh [10n wh], n as an integer, is desired as one LSB of the xWATTHR register. Then WTHR is computed using the following expression: FS FS n S I U f PMAX WTHR × × × × = 10 3600 (25) where: PMAX = 33,516,139 = 0x1FF6A6B as the instantaneous power computed when the ADC inputs are at full scale. fS = 8 kHz, the frequency with which the DSP computes the instantaneous power. UFS, IFS are the rms values of phase voltages and currents when the ADC inputs are at full scale. The maximum value that can be written on WTHR[47:0] is 247 − 1. The minimum value is 0x0, but it is recommended to write a number equal to or greater than PMAX. Never use negative numbers. The WTHR[47:0] is a 48-bit register. As previously stated, the serial ports of the ADE7878 work on 32-, 16-, or 8-bit words. As shown in Figure 63, the WTHR register is accessed as two 32-bit registers (WTHR1[31:0] and WTHR0[31:0]), each having eight MSBs padded with 0s. WTHR[47:0] 47 24 31 24 23 0 31 24 23 0 23 0 WTHR1[31:0] WTHR0[31:0] 0000 0000 24 BIT SIGNED NUMBER 0000 0000 24 BIT SIGNED NUMBER Figure 63. WTHR[47:0] Communicated As Two 32-Bit Registers This discrete time accumulation or summation is equivalent to integration in continuous time following the description in Equation 26. () () ⎭ ⎬ ⎫ ⎩ ⎨ ⎧ × = = ∑ ∫ ∞ = → 0 0 T Lim n T nT p dt t p Energy (26) where: n is the discrete time sample number. T is the sample period. In the ADE7878, the total phase active powers are accumulated in the AWATTHR[31:0], BWATTHR[31:0], and CWATTHR[31:0] 32-bit signed registers, and the fundamental phase active powers are accumulated in the AFWATTHR[31:0], BFWATTHR[31:0], and CFWATTHR[31:0] 32-bit signed registers. The active energy register content can roll over to full-scale negative (0x80000000) and continue increasing in value when the active power is positive. Conversely, if the active power is negative, the energy register underflows to full-scale positive (0x7FFFFFFF) and continues decreasing in value. Bit 0 (AEHF) in the STATUS0[31:0] register is set when Bit 30 of one of the xWATTHR registers changes, signifying that one of these registers is half full. If the active power is positive, the watt-hour register becomes half full when it increments from 0x3FFF FFFF to 0x4000 0000. If the active power is negative, the watt-hour register becomes half full when it decrements from 0xC000 0000 to 0xBFFF FFFF. Similarly, Bit 1 (FAEHF) in vSTATUS0[31:0] register is set when Bit 30 of one of the xFWATTHR registers changes, signifying that one of these registers is half full. Setting Bits[1:0] in the MASK0[31:0] register enables the FAEHF and AEHF interrupts, respectively. If enabled, the IRQ0 pin is set low and the status bit is set to 1 whenever one of the energy registers, xWATTHR (for the AEHF interrupt) or xFWATTHR (for the FAEHF interrupt), become half full. The status bit is cleared and the IRQ0 pin is set to logic high by writing to the STATUS0 register with the corresponding bit set to 1. Setting Bit 6 (RSTREAD) of the LCYMODE[7:0] register enables a read-with-reset for all watt-hour accumulation registers; that is, the registers are reset to 0 after a read operation. Integration Time Under Steady Load The discrete time sample period (T) for the accumulation register is 125 μs (8 kHz frequency). With full-scale sinusoidal signals on the analog inputs and the watt gain registers set to 0x00000, the average word value from each LPF2 is PMAX = 33,516,139 = 0x1FF6A6B. If the WTHR[47:0] threshold is set at the PMAX level, this means that the DSP generates a pulse that is added to the watt-hour registers every 125 μs. The maximum value that can be stored in the watt-hour accumulation register before it overflows is 231 − 1 or 0x7FFFFFFF. The integration time is calculated as Time = 0x7FFF,FFFF × 125 μs = 74 hr 33 min 55 sec (27) |
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