ADE7878 datasheet(56/92 Pages) AD

56 / 92 page

ADE7878

Rev. 0 | Page 56 of 92

The DSP computes the instantaneous values of all phase

powers: total active, fundamental active, total reactive,

fundamental reactive, and apparent. The process in which the

energy is sign accumulated in various xWATTHR, xVARHR,

and xVAHR registers has already been described in the energy

calculation sections. In the energy-to-frequency conversion

process, the instantaneous powers are used to generate signals

at the frequency output pins (CF1, CF2, and CF3). One digital-

to-frequency converter is used for every CFx pin. Every

converter sums certain phase powers and generates a signal

proportional to the sum. Two sets of bits decide what powers

are converted.

First, Bits[2:0] (TERMSEL1[2:0]), Bits[5:3] (TERMSEL2[2:0]),

and Bits[8:6] (TERMSEL3[2:0]) of the COMPMODE[15:0]

are added.

The TERMSEL1 bits refer to the CF1 pin, the TERMSEL2 bits

refer to the CF2 pin, and the TERMSEL3 bits refer to the CF3

pin. The TERMSELx[0] bits manage Phase A. When set to 1,

Phase A power is included in the sum of powers at the CFx

converter. When cleared to 0, Phase A power is not included.

The TERMSELx[1] bits manage Phase B, and the TERMSELx[2]

bits manage Phase C. Setting all TERMSELx bits to 1 means all

3-phase powers are added at the CFx converter. Clearing all

TERMSELx bits to 0 means no phase power is added and no CF

pulse is generated.

Second, Bits[2: 0] (CF1SEL[2:0]), Bits[5:3] (CF2SEL[2:0]), and

Bits[8:6] (CF3SEL[2:0]) in the CFMODE[15:0] register decide

what type of power is used at the inputs of the CF1, CF2, and

CF3 converters, respectively. Table 21 shows the values that

CFxSEL can have: total active, total reactive, apparent,

fundamental active, or fundamental reactive powers.

By default, the TERMSELx bits are all 1 and the CF1SEL bits are

000, the CF2SEL bits are 001, and the CF3SEL bits are 010. This

means that by default, the CF1 digital-to-frequency converter

produces signals proportional to the sum of all 3-phase total

active powers, CF2 produces signals proportional to total

reactive powers, and CF3 produces signals proportional to

apparent powers.

Table 21. CFxSEL Bits Description

CFxSEL

Description

Registers

Latched When

CFxLATCH = 1

000

CFx signal proportional to the

sum of total phase active

powers

AWATTHR,

BWATTHR,

CWATTHR

001

CFx signal proportional to the

sum of total phase reactive

powers

AVARHR, BVARHR,

CVARHR

010

CFx signal proportional to the

sum of phase apparent powers

AVAHR, BVAHR,

CVAHR

011

CFx signal proportional to the

sum of fundamental phase

active powers

AFWATTHR,

BFWATTHR,

CFWATTHR

100

CFx signal proportional to the

sum of fundamental phase

reactive powers

AFVARHR,

BFVARHR,

CFVARHR

101 to

111

Reserved

Similar to the energy accumulation process, the energy-to-

frequency conversion is accomplished in two stages. In the first

stage, the instantaneous phase powers obtained from the DSP at

the 8 kHz rate are shifted left by seven bits and then accumulate

into an internal register at a 1 MHz rate. When a threshold is

reached, a pulse is generated, and the threshold is subtracted

from the internal register. The sign of the energy in this

moment is considered the sign of the sum of phase powers (see

the Sign of Sum-of-Phase Powers in the CFx Datapath section

for details). The threshold is the same threshold used in various

active, reactive, and apparent energy accumulators in the DSP,

WTHR[47:0], VARTHR[47:0], or VATHR[47:0] registers but

this time it is shifted left by seven bits. The advantage of

accumulating the instantaneous powers at the 1 MHz rate

is that the ripple at the CFx pins is greatly diminished.

The second stage consists of the frequency divider by

CFxDEN[15:0] 16-bit unsigned registers. The values of

CFxDEN depend on the meter constant (MC), measured in

impulses/kWh and how much energy is assigned to one LSB of

various energy registers: xWATTHR, xVARHR, and so forth.

Supposing a derivative of wh [10n wh], n a positive or negative

integer, is desired as one LSB of the xWATTHR register. Then,

CFxDEN is as follows:

CFxDEN

]

imp/kwh

[

(46)

ADE7878 数据表(PDF) 56 Page - Analog Devices

ADE7878 数据表(HTML) 56 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92

数据表下载

链接网址

ADE7878 数据表(PDF) 56 Page - Analog Devices

ADE7878 数据表(HTML) 56 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92

数据表 下载

链接网址

数据表下载