ADE7878 datasheet(73/92 Pages) AD

73 / 92 page

ADE7878

Rev. 0 | Page 73 of 92

Address

Name

R/W1

Bit Length

Bit Length During

Communication2

Type3

Default

Value

Description

0x43B4

Reserved

N/A4

0x000000

This location should

not be written for

proper operation.

0x43B5

DICOEFF

R/W

32 ZPSE

0x0000000

digital integrator

algorithm. If the

integrator is turned

on, it must be set at

0xFF8000. In

practice, it is

transmitted as

0xFFF8000.

0x43B6

HPFDIS

R/W

32 ZP

0x000000

Disables/enables the

HPF in the current

datapath

(see Table 28).

0x43B7 to

Reserved

N/A4

0x000000

This memory

location should be

kept at 0x000000 for

proper operation.

0x43B8

ISUMLVL

R/W

32 ZPSE

0x000000

Threshold used in

comparison between

the sum of phase

currents and the

neutral current.

0x43BF

ISUM

32 ZP

N/A4

Sum of IAWV, IBWV,

and ICWV registers

0x43C0

AIRMS

32 ZP

N/A4

Phase A current rms

value.

0x43C1

AVRMS

32 ZP

N/A4

Phase A voltage rms

value.

0x43C2

BIRMS

32 ZP

N/A4

Phase B current rms

value.

0x43C3

BVRMS

32 ZP

N/A4

Phase B voltage rms

value.

0x43C4

CIRMS

32 ZP

N/A4

Phase C current rms

value.

0x43C5

CVRMS

32 ZP

N/A4

Phase C voltage rms

value.

0x43C6

NIRMS

32 ZP

N/A4

Neutral current rms

value.

0x43C7 to

0x43FF

Reserved

N/A4

These memory

locations should not

be written for proper

operation.

1 R is read and W is write.

2 32 ZPSE = 24-bit signed register that is transmitted as a 32-bit word with four MSBs padded with 0s and sign extended to 28 bits, whereas 32 ZP = 28- or 24-bit signed

or unsigned register that is transmitted as a 32-bit word with four eight MSBs, respectively, padded with 0s.

3 U is an unsigned register and S is a signed register in twos complement format.

4 N/A means not applicable.

ADE7878 数据表(PDF) 73 Page - Analog Devices

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ADE7878 数据表(PDF) 73 Page - Analog Devices

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