ADE7878 datasheet(20/92 Pages) AD

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ADE7878

Rev. 0 | Page 20 of 92

IRQ pin is triggered low at the end of a measurement period,

this signifies all phase currents stayed below threshold and,

therefore, there is no current flowing through the system. At

this point, the external microprocessor should set the ADE7878

in Sleep Mode PSM3. If the

IRQ pin is triggered low at the

end of the measurement period, this signifies that at least one

current input is above the defined threshold and current is

flowing through the system, although no voltage is present at

the ADE7878 pins. This situation is often called missing neutral

and is considered a tampering situation, at which point the

external microprocessor should set the ADE7878 in PSM1

mode, measure mean absolute values of phase currents, and

integrate the energy based on their values and the nominal

voltage.

It is recommended to use the ADE7878 in PSM2 mode when

Bits[2:0] (PGA1) of the Gain[15:0] register are equal to 1 or 2.

These bits represent the gain in the current channel datapath. It

is not recommended to use the ADE7878 in PSM2 mode when

the PGA1 bits are equal to 4, 8, or 16.

PHASE

COUNTER = 1

PHASE

COUNTER = 2

PHASE

COUNTER = 3

LPLINE = 2

IRQ 1

IA CURRENT

LPOIL

THRESHOLD

Figure 22. PSM2 Mode Triggering IRQ1 Pin for LPLINE = 2, 50 Hz Systems

PSM3—SLEEP MODE

In this mode, the ADE7878 has most of the internal circuits

turned off and the current consumption is at its lowest level.

The I2C, HSDC, and SPI ports are not functional during this

mode, and the RESET, SCLK/SCL, MOSI/SDA, and SS/HSA

pins should be set high.

POWER-UP PROCEDURE

The ADE7878 contains an on-chip power supply monitor that

supervises the power supply (VDD). At power-up, until VDD

reaches 2 V ± 10%, the chip is in an inactive state. As VDD

crosses this threshold, the power supply monitor keeps the chip

in this inactive state for an additional 26 ms, allowing VDD to

achieve 3.3 V − 10%, the minimum recommended supply

voltage. Because the PM0 and PM1 pins have internal pull-up

resistors and the external microprocessor keeps them high, the

ADE7878 always powers-up in sleep mode (PSM3). Then, an

external circuit (that is, a microprocessor) sets the PM1 pin to a

low level, allowing the ADE7878 to enter normal mode (PSM0).

The passage from PSM3 mode, in which most of the internal

circuitry is turned off, to PSM0 mode, in which all functionality

is enabled, is accomplished in less than 40 ms (see Figure 23 for

details).

When the ADE7878 enters PSM0 mode, the I2C port is the

active serial port. If the SPI port is used, then the SS/HSA pin

must be toggled three times high to low. This action selects the

SPI port for further use. If I2C is the active serial port, Bit 1

(I2C_LOCK) of CONFIG2[7:0] must be set to 1 to lock it in.

From this moment, the ADE7878 ignores spurious toggling of

the SS/HSA pin, and an eventual switch to use the SPI port is no

longer possible. Likewise, if SPI is the active serial port, any write

to the CONFIG2[7:0] register locks the port, at which time a

switch to use the I2C port is no longer possible.

POR TIMER

TURNED ON

ADE7878

POWERED UP

ADE7878

ENTER PSM3

MICROPROCESSOR

SETS ADE7878

IN PSM0

MICROPROCESSOR

MAKES THE

CHOICE BETWEEN

I2C AND SPI

RSTDONE

INTERRUPT

TRIGGERED

40ms

26ms

3.3V – 10%

2.0V ± 10%

ADE7878

PSM0 READY

Figure 23. Power-Up Procedure

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