ADE7878 datasheet(28/92 Pages) AD

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ADE7878

Rev. 0 | Page 28 of 92

DICOEFF[23:0] 24-bit signed register is accessed as a 32-bit

28 bits, which practically means it is transmitted equal to

0xFFF8000.

When the digital integrator is switched off, the ADE7878 can

be used directly with a conventional current sensor, such as

a current transformer (CT).

VOLTAGE CHANNEL ADC

Figure 38 shows the ADC and signal processing chain for

Input VA in the voltage channel. The VB and VC channels

have similar processing chains. The ADC outputs are signed

twos complement 24-bit words and are available at a rate of

8 kSPS. With the specified full-scale analog input signal of

±0.5 V, the ADC produces its maximum output code value.

Figure 38 shows a full-scale voltage signal being applied to the

differential inputs (VA and VN). The ADC output swings

between −5,928,256 (0xA58AC0) and +5,928,256 (0x5A7540).

Voltage Waveform Gain Registers

There is a multiplier in the signal path of each phase voltage.

The voltage waveform can be changed by ±100% by writing a

corresponding twos complement number to the 24-bit signed

current waveform gain registers (AVGAIN[23:0], BVGAIN[23:0],

and CVGAIN[23:0]). For example, if 0x400000 is written to

those registers, the ADC output is scaled up by 50%. To scale

the input by −50%, write 0xC00000 to the registers. Equation 4

describes mathematically the function of the current waveform

gain registers.

Voltage Waveform =

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

Gain

Voltage

Content

Output

ADC

(4)

Changing the content of AVGAIN[23:0], BVGAIN[23:0], and

CVGAIN[23:0] affects all calculations based on its voltage; that

is, it affects the corresponding phase active/reactive/apparent

energy and voltage rms calculation. In addition, waveform

samples are scaled accordingly.

As previously stated, the serial ports of the ADE7878 work on

32-, 16-, or 8-bit words, and the DSP works on 28 bits. As

presented in Figure 32, the AVGAIN, BVGAIN, and CVGAIN

registers are accessed as 32-bit registers with four MSBs padded

with 0s and sign extended to 28 bits.

Voltage Channel HPF

As explained in the Current Channel HPF section, the ADC

outputs can contain a dc offset that can create errors in power

and rms calculations. HPFs are placed in the signal path of the

phase voltages, similar to the ones in the current channels. The

HPFDIS[23:0] register can enable or disable the filters. See the

Current Channel HPF section for more details.

Voltage Channel Sampling

The waveform samples of the current channel are taken at the

output of HPF and stored into VAWV, VBWV, and VCWV

24-bit signed registers at a rate of 8 kSPS. All power and rms

calculations remain uninterrupted during this process. Bit 17

(DREADY) in the STATUS0[31:0] register is set when the

VAWV, VBWV, and VCWV registers are available to be read

using the I2C or SPI serial port. Setting Bit 17 (DREADY) in the

MASK0[31:0] register enables an interrupt to be set when the

DREADY flag is set. See the Digital Signal Processor section for

more details on Bit DREADY.

As previously stated, the serial ports of the ADE7878 work on

32-, 16-, or 8-bit words. Similar to registers presented in Figure 34,

the VAWV, VBWV, and VCWV 24-bit signed registers are

transmitted sign extended to 32 bits.

The ADE7878 contains an HSDC port that is specially designed

to provide fast access to the waveform sample registers. See the

HSDC Interface section for more details.

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