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ADE7878 数据表(PDF) 77 Page - Analog Devices

部件名 ADE7878
功能描述  Polyphase Multifunction Energy Metering IC with per Phase Active and Reactive Powers
PDF  92 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADE7878 数据表(HTML) 77 Page - Analog Devices

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ADE7878
Rev. 0 | Page 77 of 92
Address
Name
R/W1
Bit
Length
Bit Length During
Communication2
Type3
Default
Value4
Description
0xEC00
LPOILVL
R/W
8
8
U
0x07
Overcurrent threshold used during
PSM2 mode (see Table 48 in which
the register is detailed).
0xEC01
CONFIG2
R/W
8
8
U
0x00
Configuration register used during
PSM1 mode. See Table 49.
1 R is read and W is write.
2 32 ZP = 24- or 20-bit signed or unsigned register that is transmitted as a 32-bit word with 8 or 12 MSBs, respectively, padded with 0s. 32 SE = 24-bit signed register that
is transmitted as a 32-bit word sign extended to 32 bits. 16 ZP = 10-bit unsigned register that is transmitted as a 16-bit word with six MSBs padded with 0s.
3 U is an unsigned register S is a signed register in twos complement format.
4 N/A is not applicable.
Table 28. HPFDIS Register (Address 0x43B6)
Bit
Location
Default
Value
Description
23:0
00000000
When HPFDIS = 0x00000000, then all high pass filters in voltage and current channels are enabled. When the
register is set to any non zero value, all high pass filters are disabled.
Table 29. IPEAK Register (Address 0xE500)
Bit Location
Bit Name
Default Value
Description
23:0
IPEAKVAL[23:0]
0
These bits contain the peak value determined in the current channel.
24
IPPHASE[0]
0
When this bit is set to 1, Phase A current generated IPEAKVAL[23:0] value.
25
IPPHASE[1]
0
When this bit is set to 1, Phase B current generated IPEAKVAL[23:0] value.
26
IPPHASE[2]
0
When this bit is set to 1, Phase C current generated IPEAKVAL[23:0] value.
31:27
00000
These bits are always 0.
Table 30. VPEAK Register (Address 0xE501)
Bit Location
Bit Name
Default Value
Description
23:0
VPEAKVAL[23:0]
0
These bits contain the peak value determined in the voltage channel.
24
VPPHASE[0]
0
When this bit is set to 1, Phase A voltage generated VPEAKVAL[23:0] value.
25
VPPHASE[1]
0
When this bit is set to 1, Phase B voltage generated VPEAKVAL[23:0] value.
26
VPPHASE[2]
0
When this bit is set to 1, Phase C voltage generated VPEAKVAL[23:0] value.
31:27
00000
These bits are always 0.
Table 31. STATUS0 Register (Address 0xE502)
Bit
Location
Bit Name
Default Value
Description
0
AEHF
0
When this bit is set to 1, it indicates that Bit 30 of any one of the total active energy registers
(AWATTHR, BWATTHR, CWATTHR) has changed.
1
FAEHF
0
When this bit is set to 1, it indicates that Bit 30 of any one of the fundamental active energy
registers, FWATTHR, BFWATTHR, or CFWATTHR, has changed.
2
REHF
0
When this bit is set to 1, it indicates that Bit 30 of any one of the total reactive energy
registers (AVARHR, BVARHR, CVARHR) has changed.
3
FREHF
0
When this bit is set to 1, it indicates that Bit 30 of any one of the fundamental reactive energy
registers, AFVARHR, BFVARHR, or CFVARHR, has changed.
4
VAEHF
0
When this bit is set to 1, it indicates that Bit 30 of any one of the apparent energy registers
(AVAHR, BVAHR, CVAHR) has changed.
5
LENERGY
0
When this bit is set to 1, in line energy accumulation mode, it indicates the end of an
integration over an integer number of half-line cycles set in the LINECYC[15:0] register.
6
REVAPA
0
When this bit is set to 1, it indicates that the Phase A active power identified by Bit 6
(REVAPSEL) in the ACCMODE[7:0] register (total or fundamental) has changed sign. The sign
itself is indicated in Bit 0 (AWSIGN) of the PHSIGN[15:0] register (see Table 41).



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