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ADE7878 数据表(PDF) 64 Page - Analog Devices

部件名 ADE7878
功能描述  Polyphase Multifunction Energy Metering IC with per Phase Active and Reactive Powers
PDF  92 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADE7878 数据表(HTML) 64 Page - Analog Devices

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ADE7878
Rev. 0 | Page 64 of 92
the address of the ADE7878 followed by the 16-bit address of
the target register. The ADE7878 acknowledges every byte
received. The address byte is similar to the address byte of a
write operation and is equal to 0x70 (see the I2C Write
Operation section for details). After the last byte of the register
address has been sent and it has been acknowledged by the
ADE7878, the second stage begins with the master generating a
new start condition followed by an address byte. The most
significant seven bits of this address byte constitute the address
of the ADE7878, and they are equal to 0111000b. Bit 0 of the
address byte is a read/write bit. Because this is a read operation,
it must be set to 1; thus, the first byte of the read operation is
0x71. After this byte is received, the ADE7878 generates an
acknowledge. Then, the ADE7878 sends the value of the
register, and after every eight bits are received, the master
generates an acknowledge. All the bytes are sent with the most
significant bit first. Because registers can have 8, 16, or 32 bits,
after the last bit of the register is received, the master does not
acknowledge the transfer but generates a stop condition.
ACK GENERATED BY
ADE7878
S
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
S
0
15
SLAVE ADDRESS
MS 8 BITS OF
REGISTER ADDRESS
LS 8 BITS OF
REGISTER ADDRESS
BYTE 3 (MS)
OF REGISTER
BYTE 2 OF REGISTER
BYTE 1 OF REGISTER
BYTE 0 (LS) OF
REGISTER
87
0
31
16
15
8
7
0
0
7
111000 0
Figure 80. I2C Write Operation of a 32-Bit Register
ACK GENERATED BY
ADE7878
ACK GENERATED BY
MASTER
S
A
C
K
A
C
K
A
C
K
0
15
SLAVE ADDRESS
MSB 8 BITS OF
REGISTER ADDRESS
LSB 8 BITS OF
REGISTER ADDRESS
87
0
111 0000
S
A
C
K
A
C
K
A
C
K
A
C
K
S
0
SLAVE ADDRESS
BYTE 3 (MSB)
OF REGISTER
BYTE 2 OF
REGISTER
BYTE 1 OF
REGISTER
BYTE 0 (LSB)
OF REGISTER
31
16
15
8
7
0
0
7
111 000 1
ACK GENERATED BY
ADE7878
N
O
A
C
K
Figure 81. I2C Read Operation of a 32-Bit Register



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