ADE7878 datasheet(7/92 Pages) AD

7 / 92 page

ADE7878

Rev. 0 | Page 7 of 92

Parameter1, 2

Min

Typ

Max

Unit

Test Conditions/Comments

CLKIN

All specifications CLKIN of 16.384 MHz

Input Clock Frequency

16.384

MHz

Crystal Equivalent Series Resistance

kΩ

CLKIN Input Capacitance

CLKOUT Output Capacitance

LOGIC INPUTS—MOSI/SDA, SCLK/SCL,

CLKIN, SS, RESET, PM0, AND PM1

Input High Voltage, VINH

2.0

VDD = 3.3 V ± 10%

Input Low Voltage, VINL

0.8

VDD = 3.3 V ± 10%

Input Current, IIN

−7.5

μA

Input = 0 V, VDD = 3.3 V

μA

Input = VDD = 3.3 V

100

Input = VDD = 3.3 V

Input Capacitance, CIN

LOGIC OUTPUTS—IRQ0, IRQ1, MISO/HSD,

AND CLKOUT

DVDD = 3.3 V ± 10%

Output High Voltage, VOH

2.4

VDD = 3.3 V ± 10%

ISOURCE

800

μA

Output Low Voltage, VOL

0.4

VDD = 3.3 V ± 10%

ISINK

CF1, CF2, CF3/HSCLK

Output High Voltage, VOH

2.4

VDD = 3.3 V ± 10%

ISOURCE

500

μA

Output Low Voltage, VOL

0.4

VDD = 3.3 V ± 10%

ISINK

POWER SUPPLY

For specified performance

PSM0 Mode

VDD Pin

3.0

3.6

Minimum = 3.3 V − 10%; maximum = 3.3 V +

10%

IDD

24.29

PSM1 and PSM2 Modes

VDD Pin

2.4

3.7

IDD

PSM1 Mode

4.85

5.61

PSM2 Mode

0.2

0.259

PSM3 Mode

For specified performance

VDD Pin

2.4

3.7

IDD in PSM3 Mode

1.62

μA

1 See the Typical Performance Characteristics section.

2 See the Terminology section for a definition of the parameters.

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