ADE7878 datasheet(49/92 Pages) AD

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ADE7878

Rev. 0 | Page 49 of 92

Table 17. Sign of Reactive Power Calculation

Φ1

Integrator

Sign of Reactive Power

Between 0 to +90

Off

Positive

Between −90 to 0

Off

Negative

Between 0 to +90

Positive

Between −90 to 0

Negative

1 Φ is defined as the phase angle of the voltage signal minus the current

signal; that is, Φ is positive if the load is inductive and negative if the load is

capacitive.

Reactive Energy Calculation

Reactive energy is defined as the integral of reactive power.

Reactive Energy = ∫q(t)dt

(36)

Both total and fundamental reactive energy accumulations are

always a signed operation. Negative energy is subtracted from

the reactive energy contents.

Similar to active power, the ADE7878 achieves the integration

of the reactive power signal in two stages (see Figure 65). The

process is identical for both total and fundamental active

powers.

•

The first stage is conducted inside the DSP: every 125 μs

(8 kHz frequency), the instantaneous phase total reactive

or fundamental power is accumulated into an internal

at processor port and the threshold is subtracted from the

internal register. The sign of the energy in this moment is

considered the sign of the reactive power (see the Sign of

Reactive Power Calculation section for details).

•

The second stage is done outside the DSP and consists of

accumulating the pulses generated by the processor into

internal 32-bit accumulation registers. The content of these

registers is transferred to the var-hour registers (Registers

xVARHR[31:0] and xFVARHR[31:0]) when these registers

are accessed. AVARHR[31:0], BVARHR[31:0],

CVARHR[31:0], AFWATTHR[31:0], BFWATTHR[31:0],

and CFWATTHR[31:0] represent phase fundamental

reactive powers.

Figure 62 in the Active Energy Calculation section explains this

process. The VARTHR[47:0] 48-bit signed register contains the

threshold, and it is introduced by the user. It is common for

both total and fundamental phase reactive powers. Its value

depends on how much energy is assigned to one LSB of var-

hour registers. Supposing a derivative of a volt ampere reactive

hour (varh) at [10n varh] where n is an integer is desired as one

LSB of the VARHR register. Then, the VARTHR register can be

computed using the following equation:

PMAX

VARTHR

⋅

3600

where:

PMAX = 33,516,139 = 0x1FF6A6B, the instantaneous power

computed when the ADC inputs are at full scale.

fS = 8 kHz, the frequency with which the DSP computes the

instantaneous power.

UFS, IFS are the rms values of phase voltages and currents when

the ADC inputs are at full scale.

The maximum value that may be written on VARTHR[47:0] is

247 − 1. The minimum value is 0x0, but it is recommended to

write a number equal to or greater than PMAX. Never use

negative numbers.

The VARTHR[47:0] is a 48-bit register. As previously stated, the

serial ports of the ADE7878 work on 32-, 16-, or 8-bit words.

Similar to the WTHR[47:0] register shown in Figure 63,

VARTHR[47:0] is accessed as two 32-bit registers

(VARTHR1[31:0] and VARTHR0[31:0]), each having eight MSBs

padded with 0s.

This discrete time accumulation or summation is equivalent to

integration in continuous time following the expression in

Equation 37

()

⎭

⎬

⎫

⎩

⎨

⎧

∑

∫

∞

→

Lim

activeEner

(37)

where:

n is the discrete time sample number.

T is the sample period.

On the ADE7878, the total phase reactive powers are

accumulated in the AVARHR[31:0], BVARHR[31:0], and

CVARHR[31:0] 32-bit signed registers. The fundamental phase

reactive powers are accumulated in the AFVARHR[31:0],

BFVARHR[31:0], and CFVARHR[31:0] 32-bit signed registers.

The reactive energy register content can roll over to full-scale

negative (0x80000000) and continue increasing in value when

the reactive power is positive. Conversely, if the reactive power

is negative, the energy register underflows to full-scale positive

(0x7FFFFFFF) and continues to decrease in value.

Bit 2 (REHF) in the STATUS0[31:0] register is set when Bit 30

of one of the xVARHR registers changes, signifying that one of

these registers is half full. If the reactive power is positive, the

var-hour register becomes half full when it increments from

0x3FFF FFFF to 0x4000 0000. If the reactive power is negative,

the var-hour register becomes half full when it decrements from

0xC000 0000 to 0xBFFF FFFF. Analogously, Bit 3 (FREHF) in the

STATUS0[31:0] register is set when Bit 30 of one of the

xFVARHR registers changes, signifying that one of these

registers is half full.

Setting Bits[3:2] in the MASK0[31:0] register enables the

FREHF and REHF interrupts, respectively. If enabled, the IRQ0

pin is set low and the status bit is set to 1 whenever one of the

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